HD64F3644H Renesas Electronics America, HD64F3644H Datasheet - Page 145

• Manufacturer Part Number: HD64F3644H
• Description: IC H8 MCU FLASH 32K 64-QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300Lr

Specifications of HD64F3644H

• Core Processor: H8/300L
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: SCI
• Peripherals: PWM, WDT
• Number Of I /o: 53
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 64-QFP
• Package: 64PQFP
• Family Name: H8
• Maximum Speed: 8 MHz
• Operating Supply Voltage: 3.3|5 V
• Data Bus Width: 8 Bit
• Number Of Programmable I/os: 45
• Interface Type: SCI
• On-chip Adc: 8-chx8-bit
• Number Of Timers: 4
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

Table 6.10 System Clock Oscillation Frequencies Permitting Automatic Adjustment of
Host Bit Rate *
9600 bps
4800 bps
2400 bps
Note:
RAM Area Allocation in Boot Mode: In boot mode, the 96-byte area from H'FB80 to H'FBDF
and the 18-byte area from H'FF6E to H'FF7F are reserved for boot program use, as shown in
figure 6.11. The area to which the user program is transferred is H'FBE0 to H'FF6D (910 bytes).
The boot program area becomes available when a transition is made to the execution state for the
user program transferred to RAM. A stack area should be set within the user program as required.
Note: *
* Use a host bit rate setting of 2400, 4800, or 9600 bps only. No other setting should be
used.
These areas cannot be used until a transition is made to the execution state for the user
program transferred to RAM (i.e. a branch is made to RAM address H'FBE0). Note also
that the boot program remains in the boot program area in RAM (H'FB80 to H'FBDF,
H'FF6E to H'FF7F) even after control branches to the user program. When an interrupt
handling routine is executed in the boot program, the 16 bytes from H'FB80 to H'FB8F in
this area cannot be used. For details see section 6.7.9, Interrupt Handling during Flash
Memory Programming/Erasing.
Chip (H8/3644F, H8/3643F, H8/3642AF) Bit Rate
System Clock Oscillation Frequencies (f
Adjustment of Chip (H8/3644F, H8/3643F, H8/3642AF) Bit Rate
8 MHz to 16 MHz
4 MHz to 16 MHz
2 MHz to 16 MHz
Figure 6.11 RAM Areas in Boot Mode
H'FB80
H'FBE0
H'FF6E
H'FF7F
User program
Boot program
Boot program
transfer area
(910 bytes)
(96 bytes)
(18 bytes)
area*
area*
Rev. 6.00 Sep 12, 2006 page 123 of 526
OSC
) Permitting Automatic
REJ09B0326-0600
Section 6 ROM