HD64F3644H Renesas Electronics America, HD64F3644H Datasheet - Page 162

IC H8 MCU FLASH 32K 64-QFP

HD64F3644H

Manufacturer Part Number
HD64F3644H
Description
IC H8 MCU FLASH 32K 64-QFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300Lr
Datasheet

Specifications of HD64F3644H

Core Processor
H8/300L
Core Size
8-Bit
Speed
8MHz
Connectivity
SCI
Peripherals
PWM, WDT
Number Of I /o
53
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
64-QFP
Package
64PQFP
Family Name
H8
Maximum Speed
8 MHz
Operating Supply Voltage
3.3|5 V
Data Bus Width
8 Bit
Number Of Programmable I/os
45
Interface Type
SCI
On-chip Adc
8-chx8-bit
Number Of Timers
4
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-

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Section 6 ROM
Sample Program for Erasing Multiple Blocks
This program uses the following registers:
R0:
R1H: Used to test bits 8 to 11 of R0. Stores read data; used in dummy write.
R1L: Used to test bits 0 to 11 of R0.
R2:
R3:
R4:
R5:
R6L: Used for prewrite-verify and erase-verify fail count.
Arbitrary blocks can be erased by setting bits in R0. R0 settings should be made by writing with a
word transfer instruction.
A bit map of R0 and a sample setting for erasing specific blocks are shown below.
Note: Bits 15 to 12 should be cleared to 0.
Example: To erase blocks LB2, SB7, and SB0
R0 is set as follows:
The values of #a, #b, #c, #d, and #e in the program depend on the operating frequency. They
should be set as indicated in tables 6.11 and 6.12.
Rev. 6.00 Sep 12, 2006 page 140 of 526
REJ09B0326-0600
Bit:
R0
Bit:
R0
MOV.W
MOV.B
MOV.B
Used for erase block specification (set as explained below). Also stores address used in
prewrite and erase-verify.
Specifies address where address used in prewrite and erase-verify is stored.
Stores address used in prewrite and erase-verify.
Stores last address of block to be erased.
Used for prewrite and erase loop counter value setting.
#H'0481, R0
R0H,
R0L,
15
15
0
14
14
0
Corresponds to EBR1
Corresponds to EBR1
13
13
0
@EBR1
@EBR2
12
12
0
LB3 LB2 LB1 LB0 SB7 SB6 SB5 SB4 SB3 SB2 SB1 SB0
LB3 LB2 LB1 LB0 SB7 SB6 SB5 SB4 SB3 SB2 SB1 SB0
11
11
0
10
10
1
9
9
0
8
8
0
7
7
1
6
6
0
Corresponds to EBR2
Corresponds to EBR2
5
5
0
4
4
0
3
3
0
2
2
0
1
1
0
0
0
1

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