HD64F3644H Renesas Electronics America, HD64F3644H Datasheet - Page 240

IC H8 MCU FLASH 32K 64-QFP

HD64F3644H

Manufacturer Part Number
HD64F3644H
Description
IC H8 MCU FLASH 32K 64-QFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300Lr
Datasheet

Specifications of HD64F3644H

Core Processor
H8/300L
Core Size
8-Bit
Speed
8MHz
Connectivity
SCI
Peripherals
PWM, WDT
Number Of I /o
53
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
64-QFP
Package
64PQFP
Family Name
H8
Maximum Speed
8 MHz
Operating Supply Voltage
3.3|5 V
Data Bus Width
8 Bit
Number Of Programmable I/os
45
Interface Type
SCI
On-chip Adc
8-chx8-bit
Number Of Timers
4
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-

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Section 9 Timers
9.4.2
Timer Counter V (TCNTV)
TCNTV is an 8-bit read/write up-counter which is incremented by internal or external clock input.
The clock source is selected by bits CKS2 to CKS0 in TCRV0. The TCNTV value can be read and
written by the CPU at any time. TCNTV can be cleared by an external reset signal, or by compare
match A or B. The clearing signal is selected by bits CCLR1 and CCLR0 in TCRV0.
When TCNTV overflows from H'FF to H'00, OVF is set to 1 in TCSRV.
TCNTV is initialized to H'00 upon reset and in standby mode, watch mode, subsleep mode, and
subactive mode.
Time Constant Registers A and B (TCORA, TCORB)
TCORA and TCORB are 8-bit read/write registers.
TCORA and TCNTV are compared at all times, except during the T
cycle. When the TCORA and TCNTV contents match, CMFA is set to 1 in TCSRV. If CMIEA is
also set to 1 in TCRV0, a CPU interrupt is requested.
Timer output from the TMOV pin can be controlled by a signal resulting from compare match,
according to the settings of bits OS3 to OS0 in TCSRV.
TCORA is initialized to H'FF upon reset and in standby mode, watch mode, subsleep mode, and
subactive mode.
TCORB is similar to TCORA.
Rev. 6.00 Sep 12, 2006 page 218 of 526
REJ09B0326-0600
Bit
Initial value
Read/Write
Bit
Initial value
Read/Write
Register Descriptions
TCORn
TCNTV
R/W
R/W
7
0
7
1
7
7
TCNTV
TCORn
R/W
R/W
0
1
6
6
6
6
TCORn
TCNTV
R/W
R/W
5
0
5
1
5
5
TCORn
TCNTV
R/W
R/W
4
0
4
1
4
4
TCORn
TCNTV
R/W
R/W
3
0
3
1
3
3
3
TCORn
TCNTV
state of a TCORA write
R/W
R/W
2
0
2
1
2
2
TCORn
TCNTV
R/W
R/W
1
0
1
1
1
1
n = A or B
TCNTV
TCORn
R/W
R/W
0
0
0
1
0
0

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