HD64F3644H Renesas Electronics America, HD64F3644H Datasheet - Page 269

IC H8 MCU FLASH 32K 64-QFP

HD64F3644H

Manufacturer Part Number
HD64F3644H
Description
IC H8 MCU FLASH 32K 64-QFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300Lr
Datasheet

Specifications of HD64F3644H

Core Processor
H8/300L
Core Size
8-Bit
Speed
8MHz
Connectivity
SCI
Peripherals
PWM, WDT
Number Of I /o
53
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
64-QFP
Package
64PQFP
Family Name
H8
Maximum Speed
8 MHz
Operating Supply Voltage
3.3|5 V
Data Bus Width
8 Bit
Number Of Programmable I/os
45
Interface Type
SCI
On-chip Adc
8-chx8-bit
Number Of Timers
4
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-

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Timer Control/Status Register X (TCSRX)
Note:
TCSRX is an 8-bit register that selects clearing of the counter and controls interrupt request
signals.
TCSRX is initialized to H'00 upon reset and in standby mode, watch mode, subsleep mode, and
subactive mode. Other timing is described in section 9.6.3, Timer Operation.
Bit 7 Input Capture Flag A (ICFA): Bit 7 is a status flag that indicates that the FRC value has
been transferred to ICRA by an input capture signal. If BUFEA is set to 1 in TCRX, ICFA
indicates that the FRC value has been transferred to ICRA by an input capture signal and that the
ICRA value before this update has been transferred to ICRC.
This flag is set by hardware and cleared by software. It cannot be set by software.
Bit 7: ICFA
0
1
Bit 6 Input Capture Flag B (ICFB): Bit 6 is a status flag that indicates that the FRC value has
been transferred to ICRB by an input capture signal. If BUFEB is set to 1 in TCRX, ICFB
indicates that the FRC value has been transferred to ICRB by an input capture signal and that the
ICRB value before this update has been transferred to ICRC.
This flag is set by hardware and cleared by software. It cannot be set by software.
Bit 6: ICFB
0
1
Bit
Initial value
Read/Write
* Bits 7 to 1 can only be written with 0 for flag clearing.
R/(W) *
ICFA
Clearing condition:
After reading ICFA = 1, cleared by writing 0 to ICFA
Setting condition:
Set when the FRC value is transferred to ICRA by an input capture signal
Clearing condition:
After reading ICFB = 1, cleared by writing 0 to ICFB
Setting condition:
Set when the FRC value is transferred to ICRB by an input capture signal
Description
Description
7
0
R/(W) *
ICFB
0
6
R/(W) *
ICFC
0
5
R/(W) *
ICFD
4
0
Rev. 6.00 Sep 12, 2006 page 247 of 526
R/(W) *
OCFA
3
0
R/(W) *
OCFB
2
0
REJ09B0326-0600
R/(W) *
Section 9 Timers
OVF
1
0
(initial value)
(initial value)
CCLRA
R/W
0
0

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