HD64F3644H Renesas Electronics America, HD64F3644H Datasheet - Page 88

• Manufacturer Part Number: HD64F3644H
• Description: IC H8 MCU FLASH 32K 64-QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300Lr

Specifications of HD64F3644H

• Core Processor: H8/300L
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: SCI
• Peripherals: PWM, WDT
• Number Of I /o: 53
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 64-QFP
• Package: 64PQFP
• Family Name: H8
• Maximum Speed: 8 MHz
• Operating Supply Voltage: 3.3|5 V
• Data Bus Width: 8 Bit
• Number Of Programmable I/os: 45
• Interface Type: SCI
• On-chip Adc: 8-chx8-bit
• Number Of Timers: 4
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

Section 3 Exception Handling
Bit 6 Timer A Interrupt Enable (IENTA): Bit 6 enables or disables timer A overflow interrupt
requests.
Bit 6: IENTA
0
1
Bit 5 Reserved Bit: Bit 5 is reserved: it is always read as 0 and cannot be modified.
Bit 4 Reserved Bit: Bit 4 is reserved; it is always read as 1, and cannot be modified.
Bits 3 to 0 IRQ
to IRQ
Bit n: IENn
0
1
Interrupt Enable Register 2 (IENR2)
IENR2 is an 8-bit read/write register that enables or disables interrupt requests. Upon reset, IENR2
is initialized to H'00.
Bit 7 Direct Transfer Interrupt Enable (IENDT): Bit 7 enables or disables direct transfer
interrupt requests.
Bit 7: IENDT
0
1
Rev. 6.00 Sep 12, 2006 page 66 of 526
REJ09B0326-0600
Bit
Initial value
Read/Write
0
interrupt requests.
3
IENDT
to IRQ
R/W
Description
Disables timer A interrupt requests
Enables timer A interrupt requests
Disables interrupt requests from pin IRQ
Enables interrupt requests from pin IRQ
Description
Disables direct transfer interrupt requests
Enables direct transfer interrupt requests
Description
7
0
0
Interrupt Enable (IEN3 to IEN0): Bits 3 to 0 enable or disable IRQ
IENAD
R/W
0
6
5
0
IENS1
R/W
4
0
n
n
3
0
2
0
1
0
(initial value)
(initial value)
(initial value)
(n = 3 to 0)
0
0
3