D12312SVF20V Renesas Electronics America, D12312SVF20V Datasheet - Page 213
D12312SVF20V
Manufacturer Part Number
D12312SVF20V
Description
IC H8S/2312S MCU ROMLESS 100QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2300r
Specifications of D12312SVF20V
Core Processor
H8S/2000
Core Size
16-Bit
Speed
20MHz
Connectivity
SCI, SmartCard
Peripherals
POR, PWM, WDT
Number Of I /o
70
Program Memory Type
ROMless
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-QFP
For Use With
EDK2329 - DEV EVALUATION KIT H8S/2329
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
D12312SVF20V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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6.7.4
Figure 6.19 shows the timing for transition to the bus released state.
Address bus
HWR, LWR
BREQO *
Data bus
[1]
[2]
[3]
[4]
[5]
[6]
Note: * Output only when BREQOE is set to 1.
BREQ
BACK
Low level of BREQ pin is sampled at rise of T
BACK pin is driven low at end of CPU read cycle, releasing bus to external
bus master.
BREQ pin state is still sampled in external bus released state.
High level of BREQ pin is sampled.
BACK pin is driven high, ending bus release cycle.
BREQO signal goes high 1.5 clocks after BACK signal goes high.
RD
AS
Transition Timing
φ
T
0
Figure 6.19 Bus Released State Transition Timing
CPU cycle
T
Address
1
[1]
Minimum
1 state
T
2
[2]
2
state.
External bus released state
[3]
Rev.7.00 Feb. 14, 2007 page 179 of 1108
High impedance
High impedance
High impedance
High impedance
High impedance
[4]
Section 6 Bus Controller
[5]
REJ09B0089-0700
cycle
CPU
[6]
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