D12312SVF20V Renesas Electronics America, D12312SVF20V Datasheet - Page 540
D12312SVF20V
Manufacturer Part Number
D12312SVF20V
Description
IC H8S/2312S MCU ROMLESS 100QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2300r
Specifications of D12312SVF20V
Core Processor
H8S/2000
Core Size
16-Bit
Speed
20MHz
Connectivity
SCI, SmartCard
Peripherals
POR, PWM, WDT
Number Of I /o
70
Program Memory Type
ROMless
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-QFP
For Use With
EDK2329 - DEV EVALUATION KIT H8S/2329
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
D12312SVF20V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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Section 13 Smart Card Interface
13.2.3
Note: * When the smart card interface is used, set a value of 1 in bit 5.
The function of bits 7, 6, 3, and 2 of SMR changes in smart card interface mode.
Bit 7—GSM Mode (GM): Sets the smart card interface function to GSM mode.
This bit is cleared to 0 when the normal smart card interface is used. In GSM mode, this bit is set
to 1, the timing of setting of the TEND flag that indicates transmission completion is advanced,
and clock output control mode addition is performed. The contents of the clock output control
mode addition are specified by bits 1 and 0 of the serial control register (SCR).
Bit 7
GM
0
1
Note: etu: Elementary time unit (time for transfer of 1 bit)
Rev.7.00 Feb. 14, 2007 page 506 of 1108
REJ09B0089-0700
Bit
Initial value :
R/W
Serial Mode Register (SMR)
Description
Normal smart card interface mode operation
•
•
GSM mode smart card interface mode operation
•
•
:
:
TEND flag generation 12.5 etu (11.5 etu in block transfer mode) after beginning of
start bit
Clock output on/off control only
TEND flag generation 11.0 etu after beginning of start bit
High/low fixing control possible in addition to clock output on/off control (set by
SCR)
R/W
GM
7
0
R/W
BLK
6
0
R/W
PE *
5
0
R/W
O/E
4
0
BCP1
R/W
3
0
BCP0
R/W
2
0
CKS1
R/W
1
0
(Initial value)
CKS0
R/W
0
0
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