D12312SVF20V Renesas Electronics America, D12312SVF20V Datasheet - Page 65
D12312SVF20V
Manufacturer Part Number
D12312SVF20V
Description
IC H8S/2312S MCU ROMLESS 100QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2300r
Specifications of D12312SVF20V
Core Processor
H8S/2000
Core Size
16-Bit
Speed
20MHz
Connectivity
SCI, SmartCard
Peripherals
POR, PWM, WDT
Number Of I /o
70
Program Memory Type
ROMless
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-QFP
For Use With
EDK2329 - DEV EVALUATION KIT H8S/2329
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
D12312SVF20V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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Exception Vector Table and Memory Indirect Branch Addresses: In advanced mode the top
area starting at H'00000000 is allocated to the exception vector table in units of 32 bits. In each 32
bits, the upper 8 bits are ignored and a branch address is stored in the lower 24 bits (figure 2.1).
For details of the exception vector table, see section 4, Exception Handling.
The memory indirect addressing mode (@@aa:8) employed in the JMP and JSR instructions uses
an 8-bit absolute address included in the instruction code to specify a memory operand that
contains a branch address. In advanced mode the operand is a 32-bit longword operand, providing
a 32-bit branch address. The upper 8 bits of these 32 bits are a reserved area that is regarded as
H'00. Branch addresses can be stored in the area from H'00000000 to H'000000FF. Note that the
first part of this range is also the exception vector table.
H'00000000
H'00000003
H'00000004
H'00000007
H'00000008
H'0000000B
H'0000000C
H'00000010
Figure 2.1 Exception Vector Table (Advanced Mode)
Power-on reset exception vector
(Reserved for system use)
Exception vector 1
Reserved
Reserved
Reserved
Rev.7.00 Feb. 14, 2007 page 31 of 1108
Exception vector table
REJ09B0089-0700
Section 2 CPU
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