D12312SVF20V Renesas Electronics America, D12312SVF20V Datasheet - Page 758
D12312SVF20V
Manufacturer Part Number
D12312SVF20V
Description
IC H8S/2312S MCU ROMLESS 100QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2300r
Specifications of D12312SVF20V
Core Processor
H8S/2000
Core Size
16-Bit
Speed
20MHz
Connectivity
SCI, SmartCard
Peripherals
POR, PWM, WDT
Number Of I /o
70
Program Memory Type
ROMless
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-QFP
For Use With
EDK2329 - DEV EVALUATION KIT H8S/2329
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
D12312SVF20V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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Section 17 ROM
17.24.2 User Program Mode
The user MAT can be programmed/erased in user program mode. (The user boot MAT cannot be
programmed/erased.)
Programming/erasing is executed by downloading the program in the microcomputer.
The programming/erasing overview flow is shown in figure 17.68.
High voltage is applied to internal flash memory during the programming/erasing processing.
Therefore, transition to reset or hardware standby must not be executed. Doing so may cause
damage or destroy flash memory. If reset is executed accidentally, reset must be released after the
reset input period, which is longer than normal 100 μs.
For information on the programming procedure refer to "Programming Procedure in User Program
Mode", and for information on the erasing procedure refer to "Erasing Procedure in User Program
Mode", below.
For the overview of a processing that repeats erasing and programming by downloading the
programming program and the erasing program in separate on-chip ROM areas using FTDAR, see
"Erasing and Programming Procedure in User Program Mode" which appears later in this section.
Rev.7.00 Feb. 14, 2007 page 724 of 1108
REJ09B0089-0700
program data is prepared
transferred to the on-chip
Programming/erasing
Programming/erasing
When programming,
Programming/erasing
procedure program is
RAM and executed
start
end
Figure 17.68 Programming/Erasing Overview Flow
[1] RAM emulation mode must be canceled
[2] When the program data is made by means
[3] Programming/erasing is executed only in
[4] After programming/erasing is finished, the FWE
in advance. Download cannot be executed
in emulation mode.
of emulation, use the FTDAR register to change
the download destination. Note that the download
area and the emulation area will overlap if FTDAR
is in its initial status (H'02).
the on-chip RAM. However, if program data
is in a consecutive area and can be accessed
by the MOV.B instruction of the CPU like
SRAM/ROM, the program data can be in an
external space.
pin must be protected.
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