DF71251AD50FPV Renesas Electronics America, DF71251AD50FPV Datasheet - Page 255
DF71251AD50FPV
Manufacturer Part Number
DF71251AD50FPV
Description
MCU RISC FLASH 32K 8K 64LQFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH Tinyr
Datasheet
1.DF71243N50FPV.pdf
(794 pages)
Specifications of DF71251AD50FPV
Core Processor
SH-2
Core Size
32-Bit
Speed
50MHz
Connectivity
SCI
Peripherals
POR, PWM, WDT
Number Of I /o
37
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
64-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DF71251AD50FPV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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9.3.30
TWCR is an 8-bit readable/writable register that controls the waveform when synchronous counter
clearing occurs in TCNT_3 and TCNT_4 in complementary PWM mode and specifies whether to
clear the counters at TGRA_3 compare match. The CCE bit and WRE bit in TWCR must be
modified only while TCNT stops.
Bit
7
6 to 1
Bit Name
CCE
—
Timer Waveform Control Register (TWCR)
Note:
*
Initial
Value
0*
All 0
Initial value:
Do not set to 1 when complementary PWM mode is not selected.
R/W:
Bit:
R/W
R/(W)
R
R/(W)
CCE
0*
7
R
6
0
-
Description
Specifies whether to clear counters at TGRA_3
compare match in complementary PWM mode.
0: Does not clear counters at TGRA_3 compare match
1: Clears counters at TGRA_3 compare match
[Setting condition]
•
These bits are always read as 0. The write value should
always be 0.
Compare Match Clear Enable
Reserved
When 1 is written to CCE after reading CCE = 0
R
5
0
-
R
4
0
-
R
3
0
-
Rev. 5.00 Mar. 06, 2009 Page 235 of 770
R
2
0
-
R
1
0
-
R/(W)
WRE
0
0
REJ09B0243-0500
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