M308A5SGP#U5 Renesas Electronics America, M308A5SGP#U5 Datasheet - Page 19

MCU ROMLESS 12K RAM 144-LQFP

M308A5SGP#U5

Manufacturer Part Number
M308A5SGP#U5
Description
MCU ROMLESS 12K RAM 144-LQFP
Manufacturer
Renesas Electronics America
Series
M16C™ M32C/80r
Datasheet

Specifications of M308A5SGP#U5

Core Processor
M32C/80
Core Size
16/32-Bit
Speed
32MHz
Connectivity
EBI/EMI, I²C, IEBus, UART/USART
Peripherals
DMA, WDT
Number Of I /o
81
Program Memory Type
ROMless
Ram Size
24K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 18x10b, D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
144-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-

Available stocks

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Manufacturer
Quantity
Price
Company:
Part Number:
M308A5SGP#U5
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Company:
Part Number:
M308A5SGP#U5
Manufacturer:
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M32C/8A Group
REJ03B0213-0111 Rev.1.11 Mar 31, 2009
Page 17 of 66
Table 1.13
NOTE:
Table 1.14
Reference
voltage input
A/D converter
D/A converter
I/O port
Input port
Key input
interrupt input
A/D converter
I/O port
1. P0 to P5 function as bus control pins and cannot be used as I/O ports. P1_0 to P1_7 can be used as I/O ports
Item
Item
when using with 8-bit external bus width.
Pin Functions (100-Pin and 144-Pin Packages) (3/3)
Pin Functions (144-Pin Package Only)
VREF
AN_0 to AN_7
ADTRG
ANEX0
ANEX1
DA0, DA1
P0_0 to P0_7,
P1_0 to P1_7,
P2_0 to P2_7,
P3_0 to P3_7,
P4_0 to P4_7,
P5_0 to P5_7
P6_0 to P6_7,
P7_0 to P7_7,
P9_0 to P9_7,
P10_0 to
P10_7
P8_0 to P8_4
P8_6, P8_7
P8_5
KI0 to KI3
AN15_0 to
AN15_7
P11_0 to
P11_4,
P12_0 to
P12_7,
P13_0 to
P13_7
P14_0 to
P14_6,
P15_0 to
P15_7
Pin Name
Pin Name
I/O
Type
Type
I/O
I/O
I/O
I/O
I/O
I/O
O
I
I
I
I
I
I
I
(1)
Supply
Voltage
Voltage
Supply
VCC1
VCC1
VCC1
VCC1
VCC1
VCC2
VCC1
VCC1
VCC1
VCC1
VCC2
VCC1
The VREF pin supplies the reference voltage to the A/D converter
and D/A converter.
Analog input pins for the A/D converter.
External trigger input pin for the A/D converter.
Extended analog input pin for the A/D converter or output pin in
external op-amp connection mode.
Extended analog input pin for the A/D converter.
Output pins for the D/A converter.
8-bit CMOS I/O ports. The Port Pi Direction Register determines
if each pin is used as an input port or an output port. The Pull-Up
Control Registers determine if the input ports, divided into groups
of four, are pulled up or not.
These 8-bit I/O ports are functionally equivalent to P0.
(P7_0 and P7_1 are N-channel open drain output.)
These I/O ports are functionally equivalent to P0.
Shares the pin with NMI. Input port to read NMI pin level.
Key input interrupt input pins.
Analog input pins for the A/D converter.
These I/O ports are functionally equivalent to P0.
Description
Description
1. Overview

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