M30626SPFP#U5C Renesas Electronics America, M30626SPFP#U5C Datasheet - Page 413

• Manufacturer Part Number: M30626SPFP#U5C
• Description: IC M16C/62P MCU ROMLESS 100QFP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M16C/60r

Specifications of M30626SPFP#U5C

• Core Processor: M16C/60
• Core Size: 16-Bit
• Speed: 24MHz
• Connectivity: I²C, IEBus, UART/USART
• Peripherals: DMA, WDT
• Number Of I /o: 50
• Program Memory Type: ROMless
• Ram Size: 31K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 26x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 100-QFP
• For Use With: 867-1000 - KIT QUICK START RENESAS 62PR0K33062PS001BE - R0K33062P STARTER KITR0K33062PS000BE - KIT EVAL STARTER FOR M16C/62PM3062PT3-CPE-3 - EMULATOR COMPACT M16C/62P/30P
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

Rev.
REVISION HISTORY
Date
Page
208-
230-
230-
236-
240-
247-
247-
253-
257-
202
212
218
219
222
223
224
230
231
231
232
232
239
241
242
247
248
248
249
249
256
258
259
260
264
267
268
270
277
281
Notes are deleted. (All notes are indicated in “M16C/62 GROUP (M16C/
62P) USAGE NOTES”).
Note 1 of Figures 1.25.1 to 1.25.5 is partly revised.
Table 1.25.1 and 1.25.2 is revised.
Figure 1.25.12 is partly revised.
Table 1.26.3 is partly revised.
Table 1.26.5 is partly revised.
Table 1.26.6 is added.
Table 1.26.9 is partly revised.
Notes 1 and 2 in Table 1.26.26 is partly revised.
Notes 1 in Table 1.26.27 is partly revised.
Note 3 is added to “Data output hold time (refers to BCLK)” in Table
1.26.26 and 1.26.27.
Note 4 is added to “th(ALE-AD)” in Table 1.26.28.
Switching Characteristics is partly revised.
th(WR-AD) and th(WR-DB) in Figure 1.26.5 to 1.5.8 is partly revised.
th(ALE-AD), th(WR-CS), th(WR-DB) and th(WR-AD) in Figure 1.26.9 to
1.5.10 is partly revised.
Note 2 is added to Table 1.26.29.
Notes 1 and 2 in Table 1.26.45 is partly revised.
Notes 1 in Table 1.26.46 is partly revised.
Note 3 is added to “Data output hold time(refers to BCLK)” in Table 1.26.45
and 1.26.46
Note 4 is added to “th(ALE-AD)” in Table 1.26.47.
Switching Characteristics is partly revised.
th(WR-AD) and th(WR-DB) in Figure 1.26.15 to 1.5.18 is partly revised.
th(ALE-AD), th(WR-CS), th(WR-DB) and th(WR-AD) in Figure 1.26.19 to
1.5.20 is partly revised.
Table 1.27.1 is partly revised. Notes 3 and 4 is added.
Notes 1 and 2 is added to Table 1.27.2.
Note 2 is added to Table 1.27.3.
Notes 1 and 3 of FMR0 register of Table 1.27.4 is partly revised.
Figure 1.27.5 is partly revised. Note 2 is added.
Figure 1.27.7 is partly revised.
Figure 1.27.11 is partly revised.
Figure 1.27.12 is partly revised.
M16C/62P Group (M16C/62P, M16C/62PT) Hardware Manual
C - 6
Description
Summary