HD64F3644PV Renesas Electronics America, HD64F3644PV Datasheet - Page 156

• Manufacturer Part Number: HD64F3644PV
• Description: IC H8/3644 MCU FLASH 32K 64SDIP
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300Lr

Specifications of HD64F3644PV

• Core Processor: H8/300L
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: SCI
• Peripherals: PWM, WDT
• Number Of I /o: 53
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 64-SDIP (0.750", 19.05mm)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Section 6 ROM
Prewrite Flowchart
Rev. 6.00 Sep 12, 2006 page 134 of 526
REJ09B0326-0600
(flash memory latches programmed address
(set bit for block to be programmed to 1)
(clear bit for programmed block to 0)
Write H'00 to flash memory
Clear erase block register
Enable watchdog timer
Disable watchdog timer
Set erase block register
Select program mode
(P bit = 1 in FLMCR)
Set start address
(read data H'00?)
Prewrite verify
End of prewrite
Wait (t
Wait (x) s
Last address?
and data)
Clear P bit
OK
Start
n = 1
vs1
Yes
) µs
*1
*4
*5
*3
*6
*2
*6
NG
Figure 6.15 Prewrite Flowchart
End of programming
No
Programming error
Notes: 1. Write using a byte transfer instruction.
Yes
n
N?
2. For the timer overflow interval, set the
3. In prewrite-verify mode, P, E, PV, and EV
4. Programming time x is successively
5. t
6. The start address and last address are the
*5
timer counter value (TCW) to H'FE.
are all cleared to 0, and 12 V is applied to
the V
incremented to initial set value
(n = 1 to 6). The initial value should
therefore be set to 15.8 s or less to make
the total programming time 1 ms or less.
N:
start address and last address of the block
to be erased.
vs1
: 4 µs or more
6 (set N so that the total programming
time does not exceed 1 ms)
PP
pin. Read using a byte transfer
No
Double the programming time
(x
n + 1
Address + 1
2
2
n–1
x)
n
address