HD64F3644PV Renesas Electronics America, HD64F3644PV Datasheet - Page 161

IC H8/3644 MCU FLASH 32K 64SDIP

HD64F3644PV

Manufacturer Part Number
HD64F3644PV
Description
IC H8/3644 MCU FLASH 32K 64SDIP
Manufacturer
Renesas Electronics America
Series
H8® H8/300Lr
Datasheet

Specifications of HD64F3644PV

Core Processor
H8/300L
Core Size
8-Bit
Speed
8MHz
Connectivity
SCI
Peripherals
PWM, WDT
Number Of I /o
53
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
64-SDIP (0.750", 19.05mm)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD64F3644PV
Manufacturer:
Renesas Electronics America
Quantity:
135
Part Number:
HD64F3644PV
Manufacturer:
RENESAS
Quantity:
25
Flowchart for Erasing Multiple Blocks
Erase-verify
next block
Address + 1
address
No
No
(set bit for block to be erased to 1)
Write 0 data in all addresses to be
Dummy write to verify address
Figure 6.16 Multiple-Block Erase Flowchart
Enable watchdog timer
Set block start address as
Select erase-verify mode
Disable watchdog timer
Set erase block register
Clear EBR bit for erase
completed for all erase
(EBR1 = EBR2 = 0?)
(EV bit = 1 in FLMCR)
(flash memory latches
(E bit = 1 in FLMCR)
(read data H'FF?)
erased (prewrite)
Select erase mode
Wait (t
Wait (t
blocks erased?
Wait (x) ms
End of erase
verify address
Last address
Erase-verify
Clear EV bit
Clear E bit
OK
Yes
Yes
Yes
Verify
of block?
All erase
address)
blocks?
Start
block
n = 1
vs2
vs1
) µs
) s
*4
*5
*6
*6
*1
*2
*3
NG
Erasing halts
No
completed for all erase
Erase-verify
blocks?
Notes: 1. Program all addresses to be erased by
Rev. 6.00 Sep 12, 2006 page 139 of 526
Yes
2. Set the timer overflow interval to the initial
3. For the erase-verify dummy write, write
4. For the erase-verify operation, read the
5. Erase time x is successively incremented
6. t
following the prewrite flowchart.
value shown in table 6.13.
H'FF using a byte transfer instruction.
data using a byte transfer instruction.
When erasing multiple blocks, clear the
erase block register bits for erased blocks
and perform additional erasing only for
unerased blocks.
to initial set value
is fixed from the 4th time onward. An initial
value of 6.25 ms or less should be set,
and the time for one erasure should be 50
ms or less.
t
N:
vs1
vs2
: 4 s or more
: 2 s or more
Double the erase time
602 (set N so that the total erase
time does not exceed 30 s)
No
Yes
(x
Erase error
Erase-verify next block
n
n
2
N?
4?
No
*6
x)
2
n–1
(n = 1 to 4), and
REJ09B0326-0600
Section 6 ROM
Yes
No
n + 1
n

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