HD64F3644PV Renesas Electronics America, HD64F3644PV Datasheet - Page 183

• Manufacturer Part Number: HD64F3644PV
• Description: IC H8/3644 MCU FLASH 32K 64SDIP
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300Lr

Specifications of HD64F3644PV

• Core Processor: H8/300L
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: SCI
• Peripherals: PWM, WDT
• Number Of I /o: 53
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 64-SDIP (0.750", 19.05mm)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Notes: 1. Definitions of V
b. The V
These power-on and power-off timing requirements for V
satisfied in the event of a power failure and in recovery from a power failure. If these
requirements are not satisfied, overprogramming or overerasing may occur due to program
runaway, etc., which could cause memory cells to malfunction.
pin. The threshold level is approximately in the range from V
When this flag is set, it becomes possible to write to the flash memory control register
(FLMCR) and the erase block registers (EBR1 and EBR2), even though the V
may not yet have reached the programming voltage range of 12.0 V ±0.6 V.
Do not actually program or erase the flash memory until V
voltage range.
The programming voltage range for programming and erasing flash memory is 12.0 V ±0.6
V (11.4 V to 12.6 V). Programming and erasing cannot be performed correctly outside this
range. When not programming or erasing the flash memory, insure that the V
does not exceed the V
2. The time depends on the resonator used; refer to the electrical characteristics.
Oscillation must have stabilized (following the elapse of the oscillation settling time) or
be stopped.
When the V
oscillation settling time *
The MCU must be in the reset state, or in a state in which reset has ended normally
(reset has been released) and flash memory is not being accessed.
Apply or release V
memory (when a program in on-chip RAM or external memory is executing). Flash
memory data cannot be read normally at the instant when V
do not read flash memory while V
For a reset during operation, apply or release V
low for at least 10 system clock cycles (10 ).
The P and E bits must be cleared in the flash memory control register (FLMCR).
When applying or releasing V
There must be no program runaway.
When V
timer.
Application:
Release:
Cut-off:
PP
flag is set and cleared by a threshold decision on the voltage applied to the FV
PP
is applied, program execution must be supervised, e.g. by the watchdog
CC
power is turned on, hold the RES pin low for the duration of the
Raising the voltage from V
Dropping the voltage from 12.0 V ±0.6 V to V
Halting voltage application (floating state)
PP
CC
PP
application, release, and cut-off are as follows:
voltage. This will prevent unintentional programming and erasing.
either in the reset state, or when the CPU is not accessing flash
2
(t
rc
= 20 ms) before applying V
PP
, make sure that the P or E bit is not set by mistake.
PP
is being applied or released.
CC
to 12.0 V ±0.6 V
Rev. 6.00 Sep 12, 2006 page 161 of 526
PP
only after the RES pin has been held
CC
PP
and V
PP
has reached the programming
CC
.
PP
+2 V to 11.4 V.
is applied or released, so
PP
CC
should also be
REJ09B0326-0600
Section 6 ROM
PP
PP
voltage
voltage
PP