HD64F3644PV Renesas Electronics America, HD64F3644PV Datasheet - Page 234

• Manufacturer Part Number: HD64F3644PV
• Description: IC H8/3644 MCU FLASH 32K 64SDIP
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300Lr

Specifications of HD64F3644PV

• Core Processor: H8/300L
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: SCI
• Peripherals: PWM, WDT
• Number Of I /o: 53
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 64-SDIP (0.750", 19.05mm)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Section 9 Timers
Bits 2 to 0 Clock Select (TMB12 to TMB10): Bits 2 to 0 select the clock input to TCB1. For
external event counting, either the rising or falling edge can be selected.
Bit 2: TMB12
0
1
Note:
Timer Counter B1 (TCB1)
TCB1 is an 8-bit read-only up-counter, which is incremented by internal clock or external event
input. The clock source for input to this counter is selected by bits TMB12 to TMB10 in timer
mode register B1 (TMB1). TCB1 values can be read by the CPU at any time.
When TCB1 overflows from H'FF to H'00 or to the value set in TLB1, the IRRTB1 bit in IRR1 is
set to 1.
TCB1 is allocated to the same address as TLB1.
Upon reset, TCB1 is initialized to H'00.
Rev. 6.00 Sep 12, 2006 page 212 of 526
REJ09B0326-0600
Bit
Initial value
Read/Write
* The edge of the external event signal is selected by bit INTEG6 in interrupt edge select
register 2 (IEGR2). See section 3.3.2, Interrupt Control Registers, for details.
Bit 1: TMB11
0
1
0
1
TCB17
R
7
0
TCB16
R
0
6
Bit 0: TMB10
0
1
0
1
0
1
0
1
TCB15
R
5
0
TCB14
R
4
0
Description
Internal clock: /8192
Internal clock: /2048
Internal clock: /512
Internal clock: /256
Internal clock: /64
Internal clock: /16
Internal clock: /4
External event (TMIB): rising or falling edge *
TCB13
R
3
0
TCB12
R
2
0
TCB11
R
1
0
(initial value)
TCB10
R
0
0