HD64F3644PV Renesas Electronics America, HD64F3644PV Datasheet - Page 304

• Manufacturer Part Number: HD64F3644PV
• Description: IC H8/3644 MCU FLASH 32K 64SDIP
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300Lr

Specifications of HD64F3644PV

• Core Processor: H8/300L
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: SCI
• Peripherals: PWM, WDT
• Number Of I /o: 53
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 64-SDIP (0.750", 19.05mm)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Section 10 Serial Communication Interface
Bit 6 Extended Data Bit (SOL): Bit 6 sets the SO
output level at the SO
of the last bit of transmitted data. The SO
after a transmission. The SOL bit setting remains valid only until the start of the next transmission.
SSB mode settings also become invalid. To control the level of the SO
ends, it is necessary to write to the SOL bit at the end of each transmission. Do not write to this
register while transmission is in progress, because that may cause a malfunction.
Bit 6: SOL
0
1
Bit 5 Overrun Error Flag (ORER): When an external clock is used, bit 5 indicates the
occurrence of an overrun error. If noise occurs during a transfer, causing an extraneous pulse to be
superimposed on the normal serial clock, incorrect data may be transferred. If a clock pulse is
input after transfer completion, this bit is set to 1 indicating an overrun.
Bit 5: ORER
0
1
Bits 4 to 2 Reserved Bits: Bits 4 to 2 are reserved. They are always read as 0, and cannot be
modified.
Bit 1 TAIL MARK Transmit Flag (MTRF): When bit MRKON is set to 1, bit 1 indicates that
TAIL MARK is being sent. Bit 1 is a read-only bit and cannot be modified.
Bit 1: MTRF
0
1
Rev. 6.00 Sep 12, 2006 page 282 of 526
REJ09B0326-0600
Description
Read: SO
Write: SO
Read: SO
Write: SO
Description
Clearing condition:
After reading ORER = 1, cleared by writing 0 to ORER
Setting condition:
Set if a clock pulse is input after transfer is complete, when an external clock is
used
Description
Idle state, or 8- or 16-bit data is being transferred
TAIL MARK is being sent
1
pin. After completion of a transmission, SO
1
1
1
1
pin output level is low
pin output level changes to low
pin output level is high
pin output level changes to high
1
output can be changed by writing to SOL before or
1
output level. When read, SOL returns the
1
continues to output the value
1
pin after transmission
(initial value)
(initial value)
(initial value)