HD64F3644PV Renesas Electronics America, HD64F3644PV Datasheet - Page 315

IC H8/3644 MCU FLASH 32K 64SDIP

HD64F3644PV

Manufacturer Part Number
HD64F3644PV
Description
IC H8/3644 MCU FLASH 32K 64SDIP
Manufacturer
Renesas Electronics America
Series
H8® H8/300Lr
Datasheet

Specifications of HD64F3644PV

Core Processor
H8/300L
Core Size
8-Bit
Speed
8MHz
Connectivity
SCI
Peripherals
PWM, WDT
Number Of I /o
53
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
64-SDIP (0.750", 19.05mm)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

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Part Number
Manufacturer
Quantity
Price
Part Number:
HD64F3644PV
Manufacturer:
Renesas Electronics America
Quantity:
135
Part Number:
HD64F3644PV
Manufacturer:
RENESAS
Quantity:
25
RSR is a register used to receive serial data. Serial data input to RSR from the RXD pin is set in
the order in which it is received, starting from the LSB (bit 0), and converted to parallel data.
When one byte of data is received, it is transferred to RDR automatically.
RSR cannot be read or written directly by the CPU.
Receive Data Register (RDR)
RDR is an 8-bit register that stores received serial data.
When reception of one byte of data is finished, the received data is transferred from RSR to RDR,
and the receive operation is completed. RSR is then enabled for reception. RSR and RDR are
double-buffered, allowing consecutive receive operations.
RDR is a read-only register, and cannot be written by the CPU.
RDR is initialized to H'00 upon reset, and in standby, watch, subactive, or subsleep mode.
Transmit Shift Register (TSR)
TSR is a register used to transmit serial data. Transmit data is first transferred from TDR to TSR,
and serial data transmission is carried out by sending the data to the TXD pin in order, starting
from the LSB (bit 0). When one byte of data is transmitted, the next byte of transmit data is
transferred from TDR to TSR, and transmission started, automatically. Data transfer from TDR to
TSR is not performed if no data has been written to TDR (if bit TDRE is set to 1 in the serial
status register (SSR)).
TSR cannot be read or written directly by the CPU.
Bit
Initial value
Read/Write
Bit
Read/Write
RDR7
R
7
0
7
RDR6
R
0
6
6
RDR5
R
0
5
5
RDR4
R
4
0
4
Section 10 Serial Communication Interface
Rev. 6.00 Sep 12, 2006 page 293 of 526
RDR3
R
3
0
3
RDR2
R
2
0
2
REJ09B0326-0600
RDR1
R
1
0
1
RDR0
R
0
0
0

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