HD64F3644PV Renesas Electronics America, HD64F3644PV Datasheet - Page 316

IC H8/3644 MCU FLASH 32K 64SDIP

HD64F3644PV

Manufacturer Part Number
HD64F3644PV
Description
IC H8/3644 MCU FLASH 32K 64SDIP
Manufacturer
Renesas Electronics America
Series
H8® H8/300Lr
Datasheet

Specifications of HD64F3644PV

Core Processor
H8/300L
Core Size
8-Bit
Speed
8MHz
Connectivity
SCI
Peripherals
PWM, WDT
Number Of I /o
53
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
64-SDIP (0.750", 19.05mm)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD64F3644PV
Manufacturer:
Renesas Electronics America
Quantity:
135
Part Number:
HD64F3644PV
Manufacturer:
RENESAS
Quantity:
25
Section 10 Serial Communication Interface
Transmit Data Register (TDR)
TDR is an 8-bit register that stores transmit data. When TSR is found to be empty, the transmit
data written in TDR is transferred to TSR, and serial data transmission is started. Continuous
transmission is possible by writing the next transmit data to TDR during TSR serial data
transmission.
TDR can be read or written by the CPU at any time.
TDR is initialized to H'FF upon reset, and in standby, watch, subactive, or subsleep mode.
Serial Mode Register (SMR)
SMR is an 8-bit register used to set the serial data transfer format and to select the clock source for
the baud rate generator.
SMR can be read or written by the CPU at any time.
SMR is initialized to H'00 upon reset, and in standby, watch, subactive, or subsleep mode.
Bit 7 Communication Mode (COM): Bit 7 selects whether SCI3 operates in asynchronous
mode or synchronous mode.
Bit 7: COM
0
1
Rev. 6.00 Sep 12, 2006 page 294 of 526
REJ09B0326-0600
Bit
Initial value
Read/Write
Bit
Initial value
Read/Write
TDR7
COM
R/W
R/W
Description
Asynchronous mode
Synchronous mode
7
1
7
0
TDR6
CHR
R/W
R/W
1
0
6
6
TDR5
R/W
R/W
PE
5
1
5
0
TDR4
R/W
R/W
PM
4
1
4
0
STOP
TDR3
R/W
R/W
3
1
3
0
TDR2
R/W
R/W
MP
2
1
2
0
TDR1
CKS1
R/W
R/W
1
1
1
0
(initial value)
TDR0
CKS0
R/W
R/W
0
1
0
0

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