HD64F3644PV Renesas Electronics America, HD64F3644PV Datasheet - Page 331

IC H8/3644 MCU FLASH 32K 64SDIP

HD64F3644PV

Manufacturer Part Number
HD64F3644PV
Description
IC H8/3644 MCU FLASH 32K 64SDIP
Manufacturer
Renesas Electronics America
Series
H8® H8/300Lr
Datasheet

Specifications of HD64F3644PV

Core Processor
H8/300L
Core Size
8-Bit
Speed
8MHz
Connectivity
SCI
Peripherals
PWM, WDT
Number Of I /o
53
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
64-SDIP (0.750", 19.05mm)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD64F3644PV
Manufacturer:
Renesas Electronics America
Quantity:
135
Part Number:
HD64F3644PV
Manufacturer:
RENESAS
Quantity:
25
Note: The value set in BRR is given by the following equation:
Table 10.10 Relation between n and Clock
n
0
1
2
3
10.3.3
SCI3 can perform serial communication in two modes: asynchronous mode in which
synchronization is provided character by character, and synchronous mode in which
synchronization is provided by clock pulses. The serial mode register (SMR) is used to select
asynchronous or synchronous mode and the data transfer format, as shown in table 10.11.
The clock source for SCI3 is determined by bit COM in SMR and bits CKE1 and CKE0 in SCR3,
as shown in table 10.12.
Asynchronous Mode
Choice of 7- or 8-bit data length
Choice of parity addition, multiprocessor bit addition, and addition of 1 or 2 stop bits. (The
combination of these parameters determines the data transfer format and the character length.)
Framing error (FER), parity error (PER), overrun error (OER), and break detection during
reception
N =
where
B:
N:
OSC: Value of
n:
Operation
(8
Bit rate (bit/s)
Baud rate generator BRR setting (0 ≤ N ≤ 255)
Baud rate generator input clock number (n = 0, 1, 2, or 3)
(The relation between n and the clock is shown in table 10.10.)
OSC
2
2n
Clock
B)
/4
16
/64
OSC
10
(MHz)
6
– 1
CKS1
0
0
1
1
Section 10 Serial Communication Interface
Rev. 6.00 Sep 12, 2006 page 309 of 526
SMR Setting
CKS0
0
1
0
1
REJ09B0326-0600

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