HD64F3644PV Renesas Electronics America, HD64F3644PV Datasheet - Page 361

• Manufacturer Part Number: HD64F3644PV
• Description: IC H8/3644 MCU FLASH 32K 64SDIP
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300Lr

Specifications of HD64F3644PV

• Core Processor: H8/300L
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: SCI
• Peripherals: PWM, WDT
• Number Of I /o: 53
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 64-SDIP (0.750", 19.05mm)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Internal
basic clock
Receive data
(RXD)
Synchronization
sampling timing
Data sampling
timing
Consequently, the receive margin in asynchronous mode can be expressed as shown in
equation (1).
where
Substituting 0 for F (absolute value of clock frequency deviation) and 0.5 for D (clock duty) in
equation (1), a receive margin of 46.875% is given by equation (2).
When D = 0.5 and F = 0,
However, this is only a computed value, and a margin of 20% to 30% should be allowed when
carrying out system design.
M = (0.5 –
M: Receive margin (%)
N: Ratio of bit rate to clock (N = 16)
D: Clock duty (D = 0.5 to 1.0)
L: Frame length (L = 9 to 12)
F: Absolute value of clock frequency deviation
M = {0.5 – 1/(2
Figure 10.26 Receive Data Sampling Timing in Asynchronous Mode
0
2 N
8 clock pulses
Start bit
1
) –
16)}
D – 0.5
16 clock pulses
N
100 [%] = 46.875%
7
– (L – 0.5) F
100
15 0
Section 10 Serial Communication Interface
. . . . . . . . . . . . . . . . . . Equation (2)
Rev. 6.00 Sep 12, 2006 page 339 of 526
. . . . . . . . . . . . . . . Equation (1)
D0
7
REJ09B0326-0600
15 0
D1