HD64F3644PV Renesas Electronics America, HD64F3644PV Datasheet - Page 484

• Manufacturer Part Number: HD64F3644PV
• Description: IC H8/3644 MCU FLASH 32K 64SDIP
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300Lr

Specifications of HD64F3644PV

• Core Processor: H8/300L
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: SCI
• Peripherals: PWM, WDT
• Number Of I /o: 53
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 64-SDIP (0.750", 19.05mm)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Appendix B Internal I/O Registers
SCR3—Serial control register 3
Rev. 6.00 Sep 12, 2006 page 462 of 526
REJ09B0326-0600
Bit
Initial value
Read/Write
Transmit interrupt enable
0
1
Receive interrupt enable
0
1
Transmit data empty interrupt request (TXI) disabled
Transmit data empty interrupt request (TXI) enabled
Transmit enable
Note: 1. When bit TXD is set to 1 in PMR7
0
1
Receive data full interrupt request (RXI) and receive error interrupt request (ERI) disabled
Receive data full interrupt request (RXI) and receive error interrupt request (ERI) enabled
Receive enable
0
1
Transmit operation disabled (TXD pin is transmit data pin) *
Transmit operation enabled (TXD pin is transmit data pin) *
Multiprocessor interrupt enable
0
1
Receive operation disabled (RXD pin is I/O port)
Receive operation enabled (RXD pin is receive data pin)
Transmit end interrupt enable
0
1
Multiprocessor interrupt request disabled (normal receive operation)
[Clearing condition]
When data is received in which the multiprocessor bit is set to 1
Multiprocessor interrupt request enabled
The receive interrupt request (RXI), receive error interrupt request (ERI), and setting of the
RDRF, FER, and OER flags in the serial status register (SSR), are disabled until data with
the multiprocessor bit set to 1 is received.
Clock enable
R/W
TIE
CKE1
Bit 1
7
0
Transmit end interrupt request (TEI) disabled
Transmit end interrupt request (TEI) enabled
0
1
CKE0
Bit 0
0
1
0
1
R/W
RIE
6
0
Communication Mode
Asynchronous
Synchronous
Asynchronous
Synchronous
Asynchronous
Synchronous
Asynchronous
Synchronous
R/W
TE
5
0
R/W
RE
4
0
Clock Source
Internal clock
Internal clock
Internal clock
Reserved (Do not specify this combination)
External clock
External clock
Reserved (Do not specify this combination)
Reserved (Do not specify this combination)
Description
1
1
MPIE
R/W
3
0
H'FFAA
TEIE
R/W
2
0
SCK Pin Function
I/O port
Serial clock output
Clock output
Clock input
Serial clock input
3
CKE1
R/W
1
0
CKE0
R/W
0
0
SCI3