HD64F3644PV Renesas Electronics America, HD64F3644PV Datasheet - Page 72

IC H8/3644 MCU FLASH 32K 64SDIP

HD64F3644PV

Manufacturer Part Number
HD64F3644PV
Description
IC H8/3644 MCU FLASH 32K 64SDIP
Manufacturer
Renesas Electronics America
Series
H8® H8/300Lr
Datasheet

Specifications of HD64F3644PV

Core Processor
H8/300L
Core Size
8-Bit
Speed
8MHz
Connectivity
SCI
Peripherals
PWM, WDT
Number Of I /o
53
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
64-SDIP (0.750", 19.05mm)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD64F3644PV
Manufacturer:
Renesas Electronics America
Quantity:
135
Part Number:
HD64F3644PV
Manufacturer:
RENESAS
Quantity:
25
Section 2 CPU
2.9
2.9.1
1. Access to empty areas
2. Access to internal I/O registers
Byte size instructions should therefore be used when transferring data to or from I/O registers
other than the on-chip ROM and RAM areas. Figure 2.17 shows the data size and number of states
in which on-chip peripheral modules can be accessed.
Rev. 6.00 Sep 12, 2006 page 50 of 526
REJ09B0326-0600
The address space of the H8/300L CPU includes empty areas in addition to the RAM,
registers, and ROM areas available to the user. If these empty areas are mistakenly accessed by
an application program, the following results will occur.
Data transfer from CPU to empty area:
Data transfer from empty area to CPU:
Internal data transfer to or from on-chip modules other than the ROM and RAM areas makes
use of an 8-bit data width. If word access is attempted to these areas, the following results will
occur.
Word access from CPU to I/O register area:
Word access from I/O register to CPU:
The transferred data will be lost. This action may also cause the CPU to misoperate.
Unpredictable data is transferred.
Upper byte: Will be written to I/O register.
Lower byte: Transferred data will be lost.
Upper byte: Will be written to upper part of CPU register.
Lower byte: Unpredictable data will be written to lower part of CPU register.
Application Notes
Notes on Data Access

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