HD64F3644PV Renesas Electronics America, HD64F3644PV Datasheet - Page 74

IC H8/3644 MCU FLASH 32K 64SDIP

HD64F3644PV

Manufacturer Part Number
HD64F3644PV
Description
IC H8/3644 MCU FLASH 32K 64SDIP
Manufacturer
Renesas Electronics America
Series
H8® H8/300Lr
Datasheet

Specifications of HD64F3644PV

Core Processor
H8/300L
Core Size
8-Bit
Speed
8MHz
Connectivity
SCI
Peripherals
PWM, WDT
Number Of I /o
53
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
64-SDIP (0.750", 19.05mm)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD64F3644PV
Manufacturer:
Renesas Electronics America
Quantity:
135
Part Number:
HD64F3644PV
Manufacturer:
RENESAS
Quantity:
25
Section 2 CPU
2.9.2
The BSET, BCLR, BNOT, BST, and BIST instructions read one byte of data, modify the data,
then write the data byte again. Special care is required when using these instructions in cases
where two registers are assigned to the same address, in the case of registers that include write-
only bits, and when the instruction accesses an I/O port.
Order of Operation
1
2
3
Bit Manipulation in Two Registers Assigned to the Same Address
Example 1: timer load register and timer counter
Figure 2.18 shows an example in which two timer registers share the same address. When a bit
manipulation instruction accesses the timer load register and timer counter of a reloadable timer,
since these two registers share the same address, the following operations take place.
Order of Operation
1
2
3
The timer counter is counting, so the value read is not necessarily the same as the value in the
timer load register. As a result, bits other than the intended bit in the timer load register may be
modified to the timer counter value.
Rev. 6.00 Sep 12, 2006 page 52 of 526
REJ09B0326-0600
Read
Modify
Write
Read
Modify
Write
Notes on Bit Manipulation
Count clock
Figure 2.18 Timer Configuration Example
Operation
Read byte data at the designated address
Modify a designated bit in the read data
Write the altered byte data to the designated address
Operation
Timer counter data is read (one byte)
The CPU modifies (sets or resets) the bit designated in the instruction
The altered byte data is written to the timer load register
Timer load register
Timer counter
Reload
R
W
Internal bus
R:
W:
Read
Write

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