HD64F2145BTE20 Renesas Electronics America, HD64F2145BTE20 Datasheet - Page 565
HD64F2145BTE20
Manufacturer Part Number
HD64F2145BTE20
Description
IC H8S MCU FLASH 256K 100-QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2100r
Specifications of HD64F2145BTE20
Core Processor
H8S/2000
Core Size
16-Bit
Speed
20MHz
Connectivity
I²C, IrDA, SCI, X-Bus
Peripherals
PWM, WDT
Number Of I /o
74
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
- Current page: 565 of 847
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This LSI has an on-chip host interface (HIF) that enables connection to the ISA bus (X-BUS) and
has an on-chip LPC interface. In the following text, these two host interfaces (HIFs) are referred to
as XBS and LPC, respectively.
The XBS provides a four-channel parallel interface between the chip’s internal CPU and a host
processor.
Communication is carried out via seven control signals from the host processor (CS1, CS2 or
ECS2, CS3, CS4, HA0, IOR, and IOW), six output signals to the host processor (GA20, HIRQ1,
HIRQ11, HIRQ12, HIRQ3, and HIRQ4), and an 8-bit bidirectional command/data bus (HDB7 to
HDB0). The CS1, CS2 (or ECS2), CS3 and CS4 signals select one of the four interface channels.
18.1
IFHSTX0A_000020020700
Control of the fast GATE A20 function
Shutdown of the XBS module by the HIFSD pin
Five host interrupt requests
Features
Section 18 Host Interface X-Bus Interface (XBS)
Section 18 Host Interface X-Bus Interface (XBS)
Rev. 3.00 Mar 21, 2006 page 509 of 788
REJ09B0300-0300
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