HD64F2612FA20 Renesas Electronics America, HD64F2612FA20 Datasheet - Page 149

• Manufacturer Part Number: HD64F2612FA20
• Description: IC H8S MCU FLASH 128K 80QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2600r

Specifications of HD64F2612FA20

• Core Processor: H8S/2600
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: CAN, SCI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 43
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 80-QFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

MAC (Multiply and ACcumulate)
2. Example
•
•
CLRMAC
MAC
MAC
MAC
NOP
STMAC MACH,ER3
CLRMAC
STMAC MACH,ER3
:
Z-MULT (zero flag)
V-MULT (overflow flag)
The N-MULT, Z-MULT, and V-MULT flags are not modified by switching between
saturating and non-saturating modes, or by execution of a multiply instruction (MULXU or
MULXS).
Saturating mode
Non-saturating mode
Saturating mode
Non-saturating mode
@ER1+,@ER2+
@ER1+,@ER2+
@ER1+,@ER2+
Set when register MACL is cleared to 0 by execution of a MAC
instruction
Cleared when register MACL is not cleared to 0 by execution of a
MAC instruction
Set when registers MACH and MACL are both cleared to 0 by
execution of a MAC instruction
Cleared when register MACH or MACL is not cleared to 0 by
execution of a MAC instruction
Set when the result of the MAC instruction overflows the range
from H'80000000 (minimum) to H'7FFFFFFF (maximum)
Cleared when a CLRMAC or LDMAC instruction is executed
Note: Not cleared when the result of the MAC instruction is within
Set when the result of the MAC instruction overflows the range
from H'20000000000 (minimum) to H'1FFFFFFFFFF (maximum)
Cleared when a CLRMAC or LDMAC instruction is executed
Note: Not cleared when the result of the MAC instruction is within
the above range
the above range
Overflow occurs
Result = 0
CCR (N = 0, Z = 1, V = 1)
CCR (N = 0, Z = 1, V = 0)
Rev. 4.00 Feb 24, 2006 page 133 of 322
Section 2 Instruction Descriptions
Multiply and Accumulate
REJ09B0139-0400