HD64F2338VFC25 Renesas Electronics America, HD64F2338VFC25 Datasheet - Page 1171

MCU 3V 256K 144-QFP

HD64F2338VFC25

Manufacturer Part Number
HD64F2338VFC25
Description
MCU 3V 256K 144-QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2300r
Datasheet

Specifications of HD64F2338VFC25

Core Processor
H8S/2000
Core Size
16-Bit
Speed
25MHz
Connectivity
SCI, SmartCard
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
106
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 12x10b; D/A 4x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
144-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD64F2338VFC25
Manufacturer:
Renesas Electronics America
Quantity:
10 000
TIOR0H—Timer I/O Control Register 0H
Bit
Initial value
Read/Write
Note: 1. When bits TPSC2 to TPSC0 in TCR1 are set to B'000, and φ/1 is used as the TCNT1 count clock, this setting is invalid and
TGR0B I/O Control
0
1
0
1
0
1
:
:
:
input capture does not occur.
0
1
0
1
0
1
*
IOB3
R/W
7
0
0
1
0
1
0
1
0
1
0
1
*
*
TGR0B
is output
compare
register
TGR0B
is input
capture
register
IOB2
R/W
6
0
Output disabled
Initial output is
0 output
Output disabled
Initial output is
0 output
Capture input
source is
TIOCB
Capture input
source is channel
1/count clock
IOB1
R/W
5
0
0
pin
IOB0
R/W
4
0
TGR0A I/O Control
0 output at compare match
1 output at compare match
Toggle output at compare match
0 output at compare match
1 output at compare match
Toggle output at compare match
Input capture at rising edge
Input capture at falling edge
Input capture at both edges
Input capture at TCNT1 count-up/
count-down*
0
1
0
1
0
1
IOA3
R/W
3
0
0
1
0
1
0
1
*
1
0
1
0
1
0
1
0
1
0
1
*
*
IOA2
R/W
TGR0A
is output
compare
register
TGR0A
is input
capture
register
2
0
Rev.4.00 Sep. 07, 2007 Page 1139 of 1210
H'FFD2
* : Don't care
IOA1
R/W
Output disabled
Initial output is
0 output
Output disabled
Initial output is
1 output
Capture input
source is
TIOCA
Capture input
source is channel
1/count clock
1
0
0
pin
IOA0
R/W
0
0
0 output at compare match
1 output at compare match
Toggle output at compare match
0 output at compare match
1 output at compare match
Toggle output at compare match
Input capture at rising edge
Input capture at falling edge
Input capture at both edges
Input capture at TCNT1 count-up/
count-down
REJ09B0245-0400
* : Don't care
TPU0

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