HD64F2338VFC25 Renesas Electronics America, HD64F2338VFC25 Datasheet - Page 295
HD64F2338VFC25
Manufacturer Part Number
HD64F2338VFC25
Description
MCU 3V 256K 144-QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2300r
Datasheet
1.DF2338VFC25V.pdf
(1246 pages)
Specifications of HD64F2338VFC25
Core Processor
H8S/2000
Core Size
16-Bit
Speed
25MHz
Connectivity
SCI, SmartCard
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
106
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 12x10b; D/A 4x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
144-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
HD64F2338VFC25
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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7.5.8
DMAC activation sources consist of internal interrupts, external requests, and auto-requests. The
activation sources that can be specified depend on the transfer mode and the channel, as shown in
table 7.12.
Table 7.12 DMAC Activation Sources
Activation Source
Internal
Interrupts
External
Requests
Auto-request
Legend:
X : Cannot be specified
Activation by Internal Interrupt: An interrupt request selected as a DMAC activation source
can be sent simultaneously to the CPU and DTC. For details, see section 5, Interrupt Controller.
With activation by an internal interrupt, the DMAC accepts the request independently of the
interrupt controller. Consequently, interrupt controller priority settings are irrelevant.
If the DMAC is activated by a CPU interrupt source or an interrupt source that is not used as a
DTC activation source (DTA = 1), the interrupt source flag is cleared automatically by the DMA
transfer. With ADI, TXI, and RXI interrupts, however, the interrupt source flag is not cleared
: Can be specified
DMAC Activation Sources
RXI0
TXI1
RXI1
TGI0A
TGI1A
TGI2A
TGI3A
TGI4A
TGI5A
ADI
TXI0
DREQ pin falling edge input
DREQ pin low-level input
Channels
0A and 1A
X
X
X
Short Address Mode
Rev.4.00 Sep. 07, 2007 Page 263 of 1210
Channels
0B and 1B
X
Normal
Mode
X
X
X
X
X
X
X
X
X
X
X
Full Address Mode
REJ09B0245-0400
Block
Transfer
Mode
X
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