MC68HC711E9MFNE2 Freescale Semiconductor, MC68HC711E9MFNE2 Datasheet - Page 80
MC68HC711E9MFNE2
Manufacturer Part Number
MC68HC711E9MFNE2
Description
IC MCU 8BIT 512BYTES ROM 52-PLCC
Manufacturer
Freescale Semiconductor
Series
HC11r
Specifications of MC68HC711E9MFNE2
Core Processor
HC11
Core Size
8-Bit
Speed
2MHz
Connectivity
SCI, SPI
Peripherals
POR, WDT
Number Of I /o
38
Program Memory Size
12KB (12K x 8)
Program Memory Type
OTP
Eeprom Size
512 x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
52-PLCC
Processor Series
HC711E
Core
HC11
Data Bus Width
8 bit
Data Ram Size
512 B
Interface Type
SCI, SPI
Maximum Clock Frequency
2 MHz
Number Of Programmable I/os
38
Number Of Timers
8
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
8 bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
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Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MC68HC711E9MFNE2
Manufacturer:
TI
Quantity:
167
Company:
Part Number:
MC68HC711E9MFNE2
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
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Operating Modes and On-Chip Memory
4.4.1 RAM and Input/Output Mapping
Technical Data
80
Hardware priority is built into RAM and I/O mapping. Registers have
priority over RAM and RAM has priority over ROM. When a lower priority
resource is mapped at the same location as a higher priority resource, a
read/write of a location results in a read/write of the higher priority
resource only. For example, if both the register block and the RAM are
mapped to the same location, only the register block will be accessed. If
RAM and ROM are located at the same position, RAM has priority.
The fully static RAM can be used to store instructions, variables, and
temporary data. The direct addressing mode can access RAM locations
using a 1-byte address operand, saving program memory space and
execution time, depending on the application.
RAM contents can be preserved during periods of processor inactivity by
two methods, both of which reduce power consumption. They are:
1. In the software-based stop mode, the clocks are stopped while
2. In the second method, the MODB/V
V
related to operating frequency in CMOS integrated circuits, only a
very small amount of leakage exists when the clocks are stopped.
power from a battery backup or from a second power supply.
Figure 4-8
5-volt device. Adjustments to the circuit must be made for devices
that operate at lower voltages. Using the MODB/V
require external hardware, but can be justified when a significant
amount of external circuitry is operating from V
to maintain RAM contents, reset must be held low whenever V
is below normal operating level. Refer to
Interrupts.
Operating Modes and On-Chip Memory
DD
powers the MCU. Because power supply current is directly
shows a typical standby voltage circuit for a standard
STBY
M68HC11E Family — Rev. 3.2
Section 5. Resets and
pin can supply RAM
DD
. If V
STBY
STBY
MOTOROLA
pin may
is used
DD
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