DF2372VFQ34V Renesas Electronics America, DF2372VFQ34V Datasheet - Page 941
DF2372VFQ34V
Manufacturer Part Number
DF2372VFQ34V
Description
IC H8S/2372 MCU FLASH 144LQFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2300r
Datasheet
1.YR0K42378FC000BA.pdf
(1208 pages)
Specifications of DF2372VFQ34V
Core Processor
H8S/2000
Core Size
16-Bit
Speed
34MHz
Connectivity
I²C, IrDA, SCI, SmartCard
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
96
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 16x10b; D/A 6x8b
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
144-LQFP
For Use With
YLCDRSK2378 - KIT DEV EVAL H8S/2378 LCDYR0K42378FC000BA - KIT EVAL FOR H8S/2378HS0005KCU11H - EMULATOR E10A-USB H8S(X),SH2(A)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DF2372VFQ34V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
- Current page: 941 of 1208
- Download datasheet (8Mb)
Bit
7
6, 5
4
Bit
Name
⎯
⎯
FLER
Initial
Value
1
All 0
0
R/W
R
R
R
Description
Reserved
This bit is always read as 0. The write value should
always be 1.
Reserved
These bits are always read as 0. The write value should
always be 0.
Flash Memory Error
Indicates an error occurs during programming and
erasing flash memory. When FLER is set to 1, flash
memory enters the error protection state. This bit is
initialized at transition to a power-on reset or hardware
standby mode.
When FLER is set to 1, high voltage is applied to the
internal flash memory. To reduce the damage to flash
memory, the reset must be released after the reset
period of 100 μs which is longer than normal.
0: Flash memory operates normally
1: Indicates an error occurs during programming/erasing
•
•
•
•
Programming/erasing protection for flash memory
(error protection) is invalid.
[Clearing condition] At a power-on reset or in
hardware standby mode
flash memory.
Programming/erasing protection for flash memory
(error protection) is valid.
[Setting condition]
Section 21 Flash Memory (0.18-μm F-ZTAT Version)
When an interrupt, such as NMI, occurs during
programming/erasing flash memory.
When the flash memory is read during
programming/erasing flash memory
When the SLEEP instruction is executed during
programming/erasing flash memory
When a bus master other than the CPU, such as the
DMAC, DTC, or BREQ, gets bus mastership during
programming/erasing flash memory.
Rev.7.00 Mar. 18, 2009 page 873 of 1136
REJ09B0109-0700
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