R5F61668MZN50FPV Renesas Electronics America, R5F61668MZN50FPV Datasheet - Page 1113
R5F61668MZN50FPV
Manufacturer Part Number
R5F61668MZN50FPV
Description
MCU FLASH 1024K ROM 144-LQFP
Manufacturer
Renesas Electronics America
Series
H8® H8SX/1600r
Datasheet
1.R5F61668MZN50FPV.pdf
(1416 pages)
Specifications of R5F61668MZN50FPV
Core Processor
H8SX
Core Size
16/32-Bit
Speed
50MHz
Connectivity
EBI/EMI, I²C, IrDA, SCI, SmartCard, USB
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
92
Program Memory Size
1MB (1M x 8)
Program Memory Type
FLASH
Ram Size
56K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
144-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
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FTDAR specifies the start address of the on-chip RAM at which to download an on-chip program.
FTDAR must be set before setting the SCO bit in FCCS to 1.
Bit
7
6
5
4
3
2
1
0
Bit
Bit Name
Initial Value
R/W
Flash Transfer Destination Address Register (FTDAR)
Bit Name
TDER
TDA6
TDA5
TDA4
TDA3
TDA2
TDA1
TDA0
TDER
R/W
7
0
Initial
Value
0
0
0
0
0
0
0
0
TDA6
R/W
6
0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
TDA5
R/W
5
0
Description
Transfer Destination Address Setting Error
This bit is set to 1 when an error has occurred in setting
the start address specified by bits TDA6 to TDA0.
A start address error is determined by whether the value
set in bits TDA6 to TDA0 is within the range of H'00 to
H'02 when download is executed by setting the SCO bit
in FCCS to 1. Make sure that this bit is cleared to 0
before setting the SCO bit to 1 and the value specified
by bits TDA6 to TDA0 should be within the range of
H'00 to H'02.
0: The value specified by bits TDA6 to TDA0 is within
1: The value specified by bits TDA6 to TDA0 is between
Transfer Destination Address
Specifies the on-chip RAM start address of the
download destination. A value between H'00 and H'02,
and up to 4 Kbytes can be specified as the start address
of the on-chip RAM.
H'00: H'FF9000 is specified as the start address.
H'01: H'FFA000 is specified as the start address.
H'02: H'FFB000 is specified as the start address.
H'03 to H'7F: Setting prohibited.
the range.
H'03 and H'FF and download has stopped.
TDA4
R/W
4
0
(Specifying a value from H'03 to H'7F sets
the TDER bit to 1 and stops download of
the on-chip program.)
TDA3
R/W
3
0
Rev. 1.00 Jan. 29, 2010 Page 1081 of 1380
TDA2
R/W
2
0
Section 25 Flash Memory
TDA1
R/W
1
0
REJ09B0596-0100
TDA0
R/W
0
0
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