R5F61668MZN50FPV Renesas Electronics America, R5F61668MZN50FPV Datasheet - Page 1257
R5F61668MZN50FPV
Manufacturer Part Number
R5F61668MZN50FPV
Description
MCU FLASH 1024K ROM 144-LQFP
Manufacturer
Renesas Electronics America
Series
H8® H8SX/1600r
Datasheet
1.R5F61668MZN50FPV.pdf
(1416 pages)
Specifications of R5F61668MZN50FPV
Core Processor
H8SX
Core Size
16/32-Bit
Speed
50MHz
Connectivity
EBI/EMI, I²C, IrDA, SCI, SmartCard, USB
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
92
Program Memory Size
1MB (1M x 8)
Program Memory Type
FLASH
Ram Size
56K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
144-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
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28.8
28.8.1
If a SLEEP instruction is executed when the SSBY bit in SBYCR has been set to 1, a transition to
software standby mode is made. In this state, if the CPSBY bit in DPSBYCR is set to 1, a
transition to deep software standby mode is made.
If a software standby mode clearing source (an NMI, IRQ0 to IRQ11, 32K timer, voltage-
monitoring interrupt requests, or USB suspend/resume) occurs when a transition to software
standby mode is made, software standby mode will be cleared regardless of the DPSBY bit
setting, and the interrupt exception handling starts after the oscillation settling time for software
standby mode specified by the bits STS4 to STS0 in SBYCR has elapsed.
When both of the SSBY bit in SBYCR and the CPSBY bit in DPSBYCR are set to 1 and no
software standby mode clearing source occurs, a transition to deep software standby mode will be
made immediately after software standby mode is entered.
In deep software standby mode, the CPU, on-chip peripheral functions (except for the USB and
32K timer), on-chip RAMs 6 to 4, and oscillator functionality are all stopped. In addition, the
internal power supply to these modules stops, resulting in a significant reduction in power
consumption. At this time, the contents of all the registers of the CPU, on-chip peripheral
functions (except for the USB and 32K timer), and on-chip RAMs 6 to 4 become undefined.
Contents of the on-chip RAMs 3 to 0 and USB registers can be retained when all the bits
RAMCUT2 to RAMCUT0 in DPSBYCR have been cleared to 0. If these bits are set to all 1, the
internal power supply to the on-chip RAMs 3 to 0 and USB stops and the power consumption is
further reduced. At this time, the contents of the on-chip RAMs 3 to 0 and USB registers become
undefined.
The 32K timer, voltage detection circuit, and power-on reset circuit can be operated in deep
software standby mode.
The I/O ports can be retained in the same state as in software standby mode.
Deep Software Standby Mode
Entry to Deep Software Standby Mode
Rev. 1.00 Jan. 29, 2010 Page 1225 of 1380
Section 28 Power-Down Modes
REJ09B0596-0100
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