R5F61668MZN50FPV Renesas Electronics America, R5F61668MZN50FPV Datasheet - Page 238
R5F61668MZN50FPV
Manufacturer Part Number
R5F61668MZN50FPV
Description
MCU FLASH 1024K ROM 144-LQFP
Manufacturer
Renesas Electronics America
Series
H8® H8SX/1600r
Datasheet
1.R5F61668MZN50FPV.pdf
(1416 pages)
Specifications of R5F61668MZN50FPV
Core Processor
H8SX
Core Size
16/32-Bit
Speed
50MHz
Connectivity
EBI/EMI, I²C, IrDA, SCI, SmartCard, USB
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
92
Program Memory Size
1MB (1M x 8)
Program Memory Type
FLASH
Ram Size
56K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
144-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
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Section 9 Bus Controller (BSC)
Rev. 1.00 Jan. 29, 2010 Page 206 of 1380
REJ09B0596-0100
Bit
15
14
13 to 12 RCW1
11
Bit Name
CMF
CMIE
RCW0
⎯
Initial
Value
0
0
0
0
0
R/W
R/(W)* Compare Match Flag
R/W
R/W
R/W
R
Description
Indicates that the refresh timer counter (RTCNT) and
refresh timer constant register (RTCOR) match.
[Clearing conditions]
•
•
[Setting condition]
•
Compare Match Interrupt Enable
Enables or disables an interrupt request (CMI) when the
CMF flag is set to 1.
This bit is effective when refresh control is not
performed (RFSHE = 0). When refresh control is
performed (RFSHE = 1), this bit is always cleared to 0.
This bit cannot be modified.
CAS-RAS Wait Control
Select the number of wait cycles inserted between the
CAS asserted cycle and CAS asserted cycle during
DRAM refresh.
When the SDRAM space is selected, these bits do not
affect operations although they can be read from or
written to.
00: No wait cycle inserted
01: One wait cycle inserted
10: Two wait cycles inserted
11: Three wait cycles inserted
Reserved
The initial value should not be changed.
When 0 is written to this bit after this bit is read as 1
with RFSHE = 0
When CBR refresh is performed with RFSHE = 1
When RTCNT matches RTCOR
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