R5F61668MZN50FPV Renesas Electronics America, R5F61668MZN50FPV Datasheet - Page 288
R5F61668MZN50FPV
Manufacturer Part Number
R5F61668MZN50FPV
Description
MCU FLASH 1024K ROM 144-LQFP
Manufacturer
Renesas Electronics America
Series
H8® H8SX/1600r
Datasheet
1.R5F61668MZN50FPV.pdf
(1416 pages)
Specifications of R5F61668MZN50FPV
Core Processor
H8SX
Core Size
16/32-Bit
Speed
50MHz
Connectivity
EBI/EMI, I²C, IrDA, SCI, SmartCard, USB
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
92
Program Memory Size
1MB (1M x 8)
Program Memory Type
FLASH
Ram Size
56K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
144-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
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Section 9 Bus Controller (BSC)
9.8.3
Table 9.17 shows the pins used for the burst ROM interface.
Table 9.17 I/O Pins Used for Burst ROM Interface
Rev. 1.00 Jan. 29, 2010 Page 256 of 1380
REJ09B0596-0100
Name
Bus cycle start
Address strobe
Read strobe
Read/write
Low-high write
Low-low write
Chip select 0 and 1 CS0, CS1
Wait
I/O Pins Used for Burst ROM Interface
Symbol
BS
AS
RD
RD/WR
LHWR
LLWR
WAIT
Output
Output
Output
Output
Output
Output
Output
Input
I/O
Function
Signal indicating that the bus cycle has
started.
Strobe signal indicating that an address output on
the address bus is valid during access
Strobe signal indicating the read access
Signal indicating the data bus input or output
direction
Strobe signal indicating that the upper byte (D15 to
D8) is valid during write access
Strobe signal indicating that the lower byte (D7 to
D0) is valid during write access
Strobe signal indicating that the area is selected
Wait request signal used when an external address
space is accessed
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