R5F61668MZN50FPV Renesas Electronics America, R5F61668MZN50FPV Datasheet - Page 305
R5F61668MZN50FPV
Manufacturer Part Number
R5F61668MZN50FPV
Description
MCU FLASH 1024K ROM 144-LQFP
Manufacturer
Renesas Electronics America
Series
H8® H8SX/1600r
Datasheet
1.R5F61668MZN50FPV.pdf
(1416 pages)
Specifications of R5F61668MZN50FPV
Core Processor
H8SX
Core Size
16/32-Bit
Speed
50MHz
Connectivity
EBI/EMI, I²C, IrDA, SCI, SmartCard, USB
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
92
Program Memory Size
1MB (1M x 8)
Program Memory Type
FLASH
Ram Size
56K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
144-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
R5F61668MZN50FPV
Manufacturer:
REA
Quantity:
5
Company:
Part Number:
R5F61668MZN50FPV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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9.10.6
The number of column address output cycles can be changed from two to three clock cycles by
setting the CAST bit in DRAMCR. Set the bit according to the DRAM to be used and the
frequency of this LSI so that the CAS pulse width can be optimal.
Figure 9.39 shows a timing example when the number of column address output cycles is set to
three clock cycles.
Figure 9.39 Access Timing Example of Column Address Output Cycles for 3 Clock Cycles
Controlling Column Address Output Cycle
Read
Write
Address bus
Data bus
OE (RD)
Data bus
OE (RD)
RD/WR
LUCAS
LLCAS
RAS
WE
WE
BS
Bφ
T
p
Row address
(RAST = 0)
T
r
High
High
T
c1
Rev. 1.00 Jan. 29, 2010 Page 273 of 1380
Column address
T
c2
Section 9 Bus Controller (BSC)
T
c3
REJ09B0596-0100
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