R5F61668MZN50FPV Renesas Electronics America, R5F61668MZN50FPV Datasheet - Page 375
R5F61668MZN50FPV
Manufacturer Part Number
R5F61668MZN50FPV
Description
MCU FLASH 1024K ROM 144-LQFP
Manufacturer
Renesas Electronics America
Series
H8® H8SX/1600r
Datasheet
1.R5F61668MZN50FPV.pdf
(1416 pages)
Specifications of R5F61668MZN50FPV
Core Processor
H8SX
Core Size
16/32-Bit
Speed
50MHz
Connectivity
EBI/EMI, I²C, IrDA, SCI, SmartCard, USB
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
92
Program Memory Size
1MB (1M x 8)
Program Memory Type
FLASH
Ram Size
56K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
144-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
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R5F61668MZN50FPV
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A cycle in which an external space is not accessed due to internal operations is called an external
NOP cycle. Even when an external NOP cycle occurs between consecutive external bus cycles, an
idle cycle can be inserted. In this case, the number of external NOP cycles is included in the
number of idle cycles to be inserted.
Figure 9.97 shows an example of external NOP and idle cycle insertion.
Bφ
Address bus
CS (area A)
CS (area B)
RD
Data bus
External NOP Cycles and Idle Cycles
(Condition: Number of idle cycles to be inserted when different reads continue: 4 cycles)
T
1
Preceding bus cycle
T
2
Figure 9.97 Idle Cycle Insertion Example
T
pw
T
3
including no external access cycles (NOP)
Specified number of idle cycles or more
No external access
(NOP)
(remaining)
T
Idle cycle
i
Rev. 1.00 Jan. 29, 2010 Page 343 of 1380
T
i
T
Section 9 Bus Controller (BSC)
1
Following bus cycle
T
2
REJ09B0596-0100
T
pw
T
3
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