R5F61668MZN50FPV Renesas Electronics America, R5F61668MZN50FPV Datasheet - Page 454

MCU FLASH 1024K ROM 144-LQFP

R5F61668MZN50FPV

Manufacturer Part Number
R5F61668MZN50FPV
Description
MCU FLASH 1024K ROM 144-LQFP
Manufacturer
Renesas Electronics America
Series
H8® H8SX/1600r
Datasheet

Specifications of R5F61668MZN50FPV

Core Processor
H8SX
Core Size
16/32-Bit
Speed
50MHz
Connectivity
EBI/EMI, I²C, IrDA, SCI, SmartCard, USB
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
92
Program Memory Size
1MB (1M x 8)
Program Memory Type
FLASH
Ram Size
56K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
144-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
R5F61668MZN50FPV
Manufacturer:
REA
Quantity:
5
Part Number:
R5F61668MZN50FPV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Section 10 DMA Controller (DMAC)
(2)
In burst mode, one byte, one word, or one longword of data continues to be transferred until the
transfer end condition is satisfied.
When a burst transfer starts, a transfer request from a channel having priority is suspended until
the burst transfer is completed.
In figure 10.27, the TEND signal output is enabled and data is transferred in words from the
external 16-bit 2-state access space to the external 16-bit 2-state access space in normal transfer
mode by burst access.
Rev. 1.00 Jan. 29, 2010 Page 422 of 1380
REJ09B0596-0100
Address bus
RD
LHWR, LLWR
TEND
Normal Transfer Mode (Burst Mode)
Figure 10.27 Example of Transfer in Normal Transfer Mode by Burst Access
Bus
released
DMA read cycle
DMA write cycle
DMA read cycle
Burst transfer
DMA write cycle DMA read cycle
Last transfer cycle
DMA write cycle
Bus
released

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