R5F61668MZN50FPV Renesas Electronics America, R5F61668MZN50FPV Datasheet - Page 542
R5F61668MZN50FPV
Manufacturer Part Number
R5F61668MZN50FPV
Description
MCU FLASH 1024K ROM 144-LQFP
Manufacturer
Renesas Electronics America
Series
H8® H8SX/1600r
Datasheet
1.R5F61668MZN50FPV.pdf
(1416 pages)
Specifications of R5F61668MZN50FPV
Core Processor
H8SX
Core Size
16/32-Bit
Speed
50MHz
Connectivity
EBI/EMI, I²C, IrDA, SCI, SmartCard, USB
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
92
Program Memory Size
1MB (1M x 8)
Program Memory Type
FLASH
Ram Size
56K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
144-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
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Part Number:
R5F61668MZN50FPV
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Section 11 EXDMA Controller (EXDMAC)
(2)
With auto-request (in burst mode), when the DTE bit is set to 1 in EDMDR, an EXDMA transfer
cycle is started a minimum of three cycles later. Once transfer is started, it continues (as a burst)
until the transfer end condition is satisfied. Transfer requests for the other channel are held
pending until the end of transfer on the current channel.
Figures 11.41 to 11.43 show operation timing examples for various conditions.
Rev. 1.00 Jan. 29, 2010 Page 510 of 1380
REJ09B0596-0100
Bφ
Bus cycle
CPU operation
ETEND
DTE bit
Bφ
Bus cycle
CPU operation
EDACK
ETEND
Auto-Request/Normal Transfer Mode/Burst Mode
CPU cycle
Figure 11.40 Auto-Request/Normal Transfer Mode/Cycle Steal Mode
External
space
Figure 11.41 Auto-Request/Normal Transfer Mode/Burst Mode
CPU cycle
External
space
CPU cycle
External
space
EXDMA single
transfer cycle
External space
EXDMAC
(CPU Cycles/Single Address Mode)
read
(CPU Cycles/Dual Address Mode)
EXDMAC
One bus cycle
CPU cycle
write
EXDMAC
read
1
EXDMA single
transfer cycle
EXDMAC
write
External space
External space
Repeated
CPU cycle
EXDMAC
Last transfer cycle
read
Last transfer cycle
EXDMA single
transfer cycle
External space
EXDMAC
write
CPU cycle
CPU cycle
0
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