R5F61668MZN50FPV Renesas Electronics America, R5F61668MZN50FPV Datasheet - Page 686
R5F61668MZN50FPV
Manufacturer Part Number
R5F61668MZN50FPV
Description
MCU FLASH 1024K ROM 144-LQFP
Manufacturer
Renesas Electronics America
Series
H8® H8SX/1600r
Datasheet
1.R5F61668MZN50FPV.pdf
(1416 pages)
Specifications of R5F61668MZN50FPV
Core Processor
H8SX
Core Size
16/32-Bit
Speed
50MHz
Connectivity
EBI/EMI, I²C, IrDA, SCI, SmartCard, USB
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
92
Program Memory Size
1MB (1M x 8)
Program Memory Type
FLASH
Ram Size
56K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
144-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
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Section 13 I/O Ports
Notes: 1. If multiple CS outputs are specified to a single pin according to the CSn output pin
Rev. 1.00 Jan. 29, 2010 Page 654 of 1380
REJ09B0596-0100
Bit
4
3
2
1
0
2. If an area is specified as a byte control SDRAM space, the pin functions as RD/WR
Bit Name
BSE
RDWRS*
RDWRE*
ASOE
⎯
select bit (n = 2), multiple CS signals are output from the pin. For details, see section
9.5.3, Chip Select Signals.
output regardless of the RDWRE bit value.
2
2
Initial
Value
0
0
0
1
0
R/W
R/W
R/W
R/W
R/W
R
Description
BS Output Enable
Enables/disables the BS output
0: Disables the BS output
1: Enables the BS output
RD/WR Output Pin Select
Selects the output pin for RD/WR
0: Specifies pin PA1 as RD/WR-A output pin
1: Specifies pin PB6 as RD/WR-B output pin
RD/WR Output Enable
Enables/disables the RD/WR output
0: Disables the RD/WR output
1: Enables the RD/WR output
AS Output Enable
Enables/disables the AS output
0: Specifies pin PA6 as I/O port
1: Specifies pin PA6 as AS output pin
Reserved
This bit is always read as 0. The write value should
always be 0.
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