R5F61668MZN50FPV Renesas Electronics America, R5F61668MZN50FPV Datasheet - Page 749
R5F61668MZN50FPV
Manufacturer Part Number
R5F61668MZN50FPV
Description
MCU FLASH 1024K ROM 144-LQFP
Manufacturer
Renesas Electronics America
Series
H8® H8SX/1600r
Datasheet
1.R5F61668MZN50FPV.pdf
(1416 pages)
Specifications of R5F61668MZN50FPV
Core Processor
H8SX
Core Size
16/32-Bit
Speed
50MHz
Connectivity
EBI/EMI, I²C, IrDA, SCI, SmartCard, USB
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
92
Program Memory Size
1MB (1M x 8)
Program Memory Type
FLASH
Ram Size
56K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
144-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
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• When TGR is an input capture register
(1)
Figure 14.14 shows an example of the buffer operation setting procedure.
When input capture occurs, the value in TCNT is transferred to TGR and the value previously
held in TGR is transferred to the buffer register.
This operation is illustrated in figure 14.13.
Example of Buffer Operation Setting Procedure
Buffer register
Input capture
signal
Figure 14.14 Example of Buffer Operation Setting Procedure
Select TGR function
Set buffer operation
<Buffer operation>
Buffer operation
Start count
Figure 14.13 Input Capture Buffer Operation
[1]
[2]
[3]
Timer general
[1] Designate TGR as an input capture register or
[2] Designate TGR for buffer operation with bits
[3] Set the CST bit in TSTR to 1 to start the count
register
output compare register by means of TIOR.
BFA and BFB in TMDR.
operation.
Rev. 1.00 Jan. 29, 2010 Page 717 of 1380
Section 14 16-Bit Timer Pulse Unit (TPU)
TCNT
REJ09B0596-0100
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