R5F61668MZN50FPV Renesas Electronics America, R5F61668MZN50FPV Datasheet - Page 910

• Manufacturer Part Number: R5F61668MZN50FPV
• Description: MCU FLASH 1024K ROM 144-LQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8SX/1600r

Specifications of R5F61668MZN50FPV

• Core Processor: H8SX
• Core Size: 16/32-Bit
• Speed: 50MHz
• Connectivity: EBI/EMI, I²C, IrDA, SCI, SmartCard, USB
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 92
• Program Memory Size: 1MB (1M x 8)
• Program Memory Type: FLASH
• Ram Size: 56K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: External
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 144-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Section 19 Serial Communication Interface (SCI, CRC)
19.4.3
Either an internal clock generated by the on-chip baud rate generator or an external clock input to
the SCK pin can be selected as the SCI's transfer clock, according to the setting of the C/A bit in
SMR and the CKE1 and CKE0 bits in SCR. When an external clock is input to the SCK pin, the
clock frequency should be 16 times the bit rate (when ABCS = 0) and 8 times the bit rate (when
ABCS = 1).
In addition, when an external clock is specified, the average transfer rate or the base clock of
TMR_4 to TMR_7 can be selected by the ACS3 to ACS0 bits in SEMR_6.
When the SCI is operated on an internal clock, the clock can be output from the SCK pin. The
frequency of the clock output in this case is equal to the bit rate, and the phase is such that the
rising edge of the clock is in the middle of the transmit data, as shown in figure 19.7.
Rev. 1.00 Jan. 29, 2010 Page 878 of 1380
REJ09B0596-0100
SCK
TxD
Clock
Figure 19.7 Phase Relation between Output Clock and Transmit Data
0
D0
D1
D2
(Asynchronous Mode)
D3
D4
1 frame
D5
D6
D7
0/1
1
1