R5F61668MZN50FPV Renesas Electronics America, R5F61668MZN50FPV Datasheet - Page 940
R5F61668MZN50FPV
Manufacturer Part Number
R5F61668MZN50FPV
Description
MCU FLASH 1024K ROM 144-LQFP
Manufacturer
Renesas Electronics America
Series
H8® H8SX/1600r
Datasheet
1.R5F61668MZN50FPV.pdf
(1416 pages)
Specifications of R5F61668MZN50FPV
Core Processor
H8SX
Core Size
16/32-Bit
Speed
50MHz
Connectivity
EBI/EMI, I²C, IrDA, SCI, SmartCard, USB
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
92
Program Memory Size
1MB (1M x 8)
Program Memory Type
FLASH
Ram Size
56K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
144-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
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Section 19 Serial Communication Interface (SCI, CRC)
19.7.8
Clock output can be fixed using the CKE1 and CKE0 bits in SCR when the GM bit in SMR is set
to 1. Specifically, the minimum width of a clock pulse can be specified.
Figure 19.34 shows an example of clock output fixing timing when the CKE0 bit is controlled
with GM = 1 and CKE1 = 0.
Rev. 1.00 Jan. 29, 2010 Page 908 of 1380
REJ09B0596-0100
CKE0
SCK
Clock Output Control (Only SCI_0, 1, and 4)
No
No
Figure 19.33 Sample Reception Flowchart
Figure 19.34 Clock Output Fixing Timing
Given pulse width
clear RDRF flag in SSR to 0
Read data from RDR and
Clear RE bit in SCR to 0
All data received?
Start reception
and PER = 0?
Initialization
ORER = 0
RDRF = 1 ?
Start
Yes
Yes
Yes
No
Error processing
Given pulse width
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