MC68HC711E9CFNE2 Freescale Semiconductor, MC68HC711E9CFNE2 Datasheet - Page 10

• Manufacturer Part Number: MC68HC711E9CFNE2
• Description: IC MCU 8BIT 512RAM 52-PLC
• Manufacturer: Freescale Semiconductor
• Series: HC11r

Specifications of MC68HC711E9CFNE2

• Core Processor: HC11
• Core Size: 8-Bit
• Speed: 2MHz
• Connectivity: SCI, SPI
• Peripherals: POR, WDT
• Number Of I /o: 38
• Program Memory Size: 12KB (12K x 8)
• Program Memory Type: OTP
• Eeprom Size: 512 x 8
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 52-PLCC
• Processor Series: HC711E
• Core: HC11
• Data Bus Width: 8 bit
• Data Ram Size: 512 B
• Interface Type: SCI, SPI
• Maximum Clock Frequency: 2 MHz
• Number Of Programmable I/os: 38
• Number Of Timers: 8
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8 bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Table of Contents
Technical Data
10
5.1
5.2
5.3
5.3.1
5.3.2
5.3.3
5.3.4
5.3.5
5.3.6
5.4
5.4.1
5.4.2
5.4.3
5.4.4
5.4.5
5.4.6
5.4.7
5.4.8
5.4.9
5.4.10
5.5
5.5.1
5.6
5.6.1
5.6.2
5.6.3
5.6.4
5.6.5
5.6.6
5.7
5.7.1
5.7.2
Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 107
Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 108
Resets. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 108
Effects of Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 114
Reset and Interrupt Priority. . . . . . . . . . . . . . . . . . . . . . . . . . . 117
Interrupts. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 121
Low-Power Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 129
Power-On Reset (POR) . . . . . . . . . . . . . . . . . . . . . . . . . . . 109
External Reset (RESET) . . . . . . . . . . . . . . . . . . . . . . . . . . 109
Computer Operating Properly (COP) Reset . . . . . . . . . . . . 110
Clock Monitor Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 111
System Configuration Options Register . . . . . . . . . . . . . . . 112
Configuration Control Register . . . . . . . . . . . . . . . . . . . . . . 113
Central Processor Unit (CPU) . . . . . . . . . . . . . . . . . . . . . . 115
Memory Map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 115
Timer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 115
Real-Time Interrupt (RTI) . . . . . . . . . . . . . . . . . . . . . . . . . . 116
Pulse Accumulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 116
Computer Operating Properly (COP) . . . . . . . . . . . . . . . . . 116
Serial Communications Interface (SCI) . . . . . . . . . . . . . . . 116
Serial Peripheral Interface (SPI). . . . . . . . . . . . . . . . . . . . . 117
Analog-to-Digital (A/D) Converter. . . . . . . . . . . . . . . . . . . . 117
System . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 117
Highest Priority Interrupt and Miscellaneous Register . . . . 119
Interrupt Recognition and Register Stacking . . . . . . . . . . . 122
Non-Maskable Interrupt Request (XIRQ) . . . . . . . . . . . . . .123
Illegal Opcode Trap . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 123
Software Interrupt (SWI). . . . . . . . . . . . . . . . . . . . . . . . . . . 124
Maskable Interrupts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 124
Reset and Interrupt Processing . . . . . . . . . . . . . . . . . . . . . 124
Wait Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .130
Stop Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .130
Section 5. Resets and Interrupts
Table of Contents
M68HC11E Family — Rev. 3.2
MOTOROLA