MC68HC711E9CFNE2 Freescale Semiconductor, MC68HC711E9CFNE2 Datasheet - Page 11

IC MCU 8BIT 512RAM 52-PLC

MC68HC711E9CFNE2

Manufacturer Part Number
MC68HC711E9CFNE2
Description
IC MCU 8BIT 512RAM 52-PLC
Manufacturer
Freescale Semiconductor
Series
HC11r
Datasheet

Specifications of MC68HC711E9CFNE2

Core Processor
HC11
Core Size
8-Bit
Speed
2MHz
Connectivity
SCI, SPI
Peripherals
POR, WDT
Number Of I /o
38
Program Memory Size
12KB (12K x 8)
Program Memory Type
OTP
Eeprom Size
512 x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
52-PLCC
Processor Series
HC711E
Core
HC11
Data Bus Width
8 bit
Data Ram Size
512 B
Interface Type
SCI, SPI
Maximum Clock Frequency
2 MHz
Number Of Programmable I/os
38
Number Of Timers
8
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
8 bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC68HC711E9CFNE2
Manufacturer:
TE
Quantity:
12 000
Part Number:
MC68HC711E9CFNE2
Manufacturer:
FREESCAL
Quantity:
5 530
Part Number:
MC68HC711E9CFNE2
Manufacturer:
FREESCALE
Quantity:
1 133
M68HC11E Family — Rev. 3.2
MOTOROLA
6.1
6.2
6.3
6.4
6.5
6.6
6.7
6.8
6.9
7.1
7.2
7.3
7.4
7.5
7.6
7.6.1
7.6.2
7.7
7.8
7.8.1
7.8.2
7.8.3
7.8.4
7.8.5
7.9
7.10
Section 7. Serial Communications Interface (SCI)
Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 133
Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 133
Port A . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 134
Port B . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 136
Port C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 136
Port D . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 138
Port E . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 139
Handshake Protocol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 139
Parallel I/O Control Register . . . . . . . . . . . . . . . . . . . . . . . . . . 141
Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 145
Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 145
Data Format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 146
Transmit Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .146
Receive Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 148
Wakeup Feature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 148
SCI Error Detection. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .151
SCI Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .152
Status Flags and Interrupts. . . . . . . . . . . . . . . . . . . . . . . . . . . 160
Receiver Flags . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 162
Section 6. Parallel Input/Output (I/O) Ports
Idle-Line Wakeup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 150
Address-Mark Wakeup . . . . . . . . . . . . . . . . . . . . . . . . . . . .150
Serial Communications Data Register . . . . . . . . . . . . . . . . 152
Serial Communications Control Register 1 . . . . . . . . . . . . 153
Serial Communications Control Register 2 . . . . . . . . . . . . 154
Serial Communication Status Register. . . . . . . . . . . . . . . . 155
Baud Rate Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 157
Table of Contents
Table of Contents
Technical Data
11

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