MC68HC711E9CFNE2 Freescale Semiconductor, MC68HC711E9CFNE2 Datasheet - Page 138

• Manufacturer Part Number: MC68HC711E9CFNE2
• Description: IC MCU 8BIT 512RAM 52-PLC
• Manufacturer: Freescale Semiconductor
• Series: HC11r

Specifications of MC68HC711E9CFNE2

• Core Processor: HC11
• Core Size: 8-Bit
• Speed: 2MHz
• Connectivity: SCI, SPI
• Peripherals: POR, WDT
• Number Of I /o: 38
• Program Memory Size: 12KB (12K x 8)
• Program Memory Type: OTP
• Eeprom Size: 512 x 8
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 52-PLCC
• Processor Series: HC711E
• Core: HC11
• Data Bus Width: 8 bit
• Data Ram Size: 512 B
• Interface Type: SCI, SPI
• Maximum Clock Frequency: 2 MHz
• Number Of Programmable I/os: 38
• Number Of Timers: 8
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8 bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Parallel Input/Output (I/O) Ports
6.6 Port D
Technical Data
138
Alternate Function:
Address:
Address:
In all modes, port D bits [5:0] can be used either for general-purpose I/O
or with the serial communications interface (SCI) and serial peripheral
interface (SPI) subsystems. During reset, port D pins PD[5:0] are
configured as high-impedance inputs (DDRD bits cleared).
Bits [7:6] — Unimplemented
DDRD[5:0] — Port D Data Direction Bits
Reset:
Reset:
Read:
Read:
Write:
Write:
Always read 0
When DDRD bit 5 is 1 and MSTR = 1 in SPCR, PD5/SS is a
general-purpose output and mode fault logic is disabled.
0 = Input
1 = Output
I = Indeterminate after reset
$1008
$1009
Figure 6-8. Port D Data Direction Register (DDRD)
Bit 7
Bit 7
—
—
Figure 6-7. Port D Data Register (PORTD)
0
0
Parallel Input/Output (I/O) Ports
= Unimplemented
—
—
6
0
6
0
DDRD5
PD5
PD5
SS
5
5
0
I
DDRD4
SCK
PD4
PD4
4
4
0
I
DDRD3
MOSI
PD3
PD3
3
3
0
I
M68HC11E Family — Rev. 3.2
DDRD2
MISO
PD2
PD2
2
2
0
I
DDRD1
PD1
PD1
Tx
1
1
0
I
MOTOROLA
DDRD0
Bit 0
PD0
PD0
RxD
Bit 0
0
I