MC68HC711E9CFNE2 Freescale Semiconductor, MC68HC711E9CFNE2 Datasheet - Page 155

• Manufacturer Part Number: MC68HC711E9CFNE2
• Description: IC MCU 8BIT 512RAM 52-PLC
• Manufacturer: Freescale Semiconductor
• Series: HC11r

Specifications of MC68HC711E9CFNE2

• Core Processor: HC11
• Core Size: 8-Bit
• Speed: 2MHz
• Connectivity: SCI, SPI
• Peripherals: POR, WDT
• Number Of I /o: 38
• Program Memory Size: 12KB (12K x 8)
• Program Memory Type: OTP
• Eeprom Size: 512 x 8
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 52-PLCC
• Processor Series: HC711E
• Core: HC11
• Data Bus Width: 8 bit
• Data Ram Size: 512 B
• Interface Type: SCI, SPI
• Maximum Clock Frequency: 2 MHz
• Number Of Programmable I/os: 38
• Number Of Timers: 8
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8 bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

7.8.4 Serial Communication Status Register
M68HC11E Family — Rev. 3.2
MOTOROLA
Address:
RWU — Receiver Wakeup Control Bit
SBK — Send Break
The SCSR provides inputs to the interrupt logic circuits for generation of
the SCI system interrupt.
TDRE — Transmit Data Register Empty Flag
Reset:
Read:
Write:
At least one character time of break is queued and sent each time
SBK is written to 1. As long as the SBK bit is set, break characters are
queued and sent. More than one break may be sent if the transmitter
is idle at the time the SBK bit is toggled on and off, as the baud rate
clock edge could occur between writing the 1 and writing the 0 to SBK.
This flag is set when SCDR is empty. Clear the TDRE flag by reading
SCSR with TDRE set and then writing to SCDR.
Figure 7-6. Serial Communications Status Register (SCSR)
0 = Normal SCI receiver
1 = Wakeup enabled and receiver interrupts inhibited
0 = Break generator off
1 = Break codes generated
0 = SCDR busy
0 = SCDR empty
Serial Communications Interface (SCI)
$102E
TDRE
Bit 7
1
= Unimplemented
TC
6
1
RDRF
5
0
IDLE
4
0
Serial Communications Interface (SCI)
OR
3
0
NF
2
0
FE
1
0
Technical Data
SCI Registers
Bit 0
0
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