MC68HC711E9CFNE2 Freescale Semiconductor, MC68HC711E9CFNE2 Datasheet - Page 162

• Manufacturer Part Number: MC68HC711E9CFNE2
• Description: IC MCU 8BIT 512RAM 52-PLC
• Manufacturer: Freescale Semiconductor
• Series: HC11r

Specifications of MC68HC711E9CFNE2

• Core Processor: HC11
• Core Size: 8-Bit
• Speed: 2MHz
• Connectivity: SCI, SPI
• Peripherals: POR, WDT
• Number Of I /o: 38
• Program Memory Size: 12KB (12K x 8)
• Program Memory Type: OTP
• Eeprom Size: 512 x 8
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 52-PLCC
• Processor Series: HC711E
• Core: HC11
• Data Bus Width: 8 bit
• Data Ram Size: 512 B
• Interface Type: SCI, SPI
• Maximum Clock Frequency: 2 MHz
• Number Of Programmable I/os: 38
• Number Of Timers: 8
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8 bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Serial Communications Interface (SCI)
7.10 Receiver Flags
Technical Data
162
interrupt mask for TDRE. When TIE is 0, TDRE must be polled. When
TIE and TDRE are 1, an interrupt is requested.
The TC flag indicates the transmitter has completed the queue. The
TCIE bit is the local interrupt mask for TC. When TCIE is 0, TC must be
polled. When TCIE is 1 and TC is 1, an interrupt is requested.
Writing a 0 to TE requests that the transmitter stop when it can. The
transmitter completes any transmission in progress before actually
shutting down. Only an MCU reset can cause the transmitter to stop and
shut down immediately. If TE is written to 0 when the transmitter is
already idle, the pin reverts to its general-purpose I/O function
(synchronized to the bit-rate clock). If anything is being transmitted when
TE is written to 0, that character is completed before the pin reverts to
general-purpose I/O, but any other characters waiting in the transmit
queue are lost. The TC and TDRE flags are set at the completion of this
last character, even though TE has been disabled.
The SCI receiver has five status flags, three of which can generate
interrupt requests. The status flags are set by the SCI logic in response
to specific conditions in the receiver. These flags can be read (polled) at
any time by software. Refer to
arbitration.
When an overrun takes place, the new character is lost, and the
character that was in its way in the parallel RDR is undisturbed. RDRF
is set when a character has been received and transferred into the
parallel RDR. The OR flag is set instead of RDRF if overrun occurs. A
new character is ready to be transferred into RDR before a previous
character is read from RDR.
The NF and FE flags provide additional information about the character
in the RDR, but do not generate interrupt requests.
The last receiver status flag and interrupt source come from the IDLE
flag. The RxD line is idle if it has constantly been at logic 1 for a full
character time. The IDLE flag is set only after the RxD line has been
Serial Communications Interface (SCI)
Figure
7-10, which shows SCI interrupt
M68HC11E Family — Rev. 3.2
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