MC68HC711E9CFNE2 Freescale Semiconductor, MC68HC711E9CFNE2 Datasheet - Page 53

• Manufacturer Part Number: MC68HC711E9CFNE2
• Description: IC MCU 8BIT 512RAM 52-PLC
• Manufacturer: Freescale Semiconductor
• Series: HC11r

Specifications of MC68HC711E9CFNE2

• Core Processor: HC11
• Core Size: 8-Bit
• Speed: 2MHz
• Connectivity: SCI, SPI
• Peripherals: POR, WDT
• Number Of I /o: 38
• Program Memory Size: 12KB (12K x 8)
• Program Memory Type: OTP
• Eeprom Size: 512 x 8
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 52-PLCC
• Processor Series: HC711E
• Core: HC11
• Data Bus Width: 8 bit
• Data Ram Size: 512 B
• Interface Type: SCI, SPI
• Maximum Clock Frequency: 2 MHz
• Number Of Programmable I/os: 38
• Number Of Timers: 8
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8 bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

3.3.6.8 STOP Disable (S)
3.4 Data Types
3.5 Opcodes and Operands
M68HC11E Family — Rev. 3.2
MOTOROLA
hardware (RESET or XIRQ acknowledge). X is cleared only by program
instruction (TAP, where the associated bit of A is 0; or RTI, where bit 6
of the value loaded into the CCR from the stack has been cleared).
There is no hardware action for clearing X.
Setting the STOP disable (S) bit prevents the STOP instruction from
putting the M68HC11 into a low-power stop condition. If the STOP
instruction is encountered by the CPU while the S bit is set, it is treated
as a no-operation (NOP) instruction, and processing continues to the
next instruction. S is set by reset; STOP is disabled by default.
The M68HC11 CPU supports four data types:
A byte is eight bits wide and can be accessed at any byte location. A
word is composed of two consecutive bytes with the most significant
byte at the lower value address. Because the M68HC11 is an 8-bit CPU,
there are no special requirements for alignment of instructions or
operands.
The M68HC11 Family of microcontrollers uses 8-bit opcodes. Each
opcode identifies a particular instruction and associated addressing
mode to the CPU. Several opcodes are required to provide each
instruction with a range of addressing capabilities. Only 256 opcodes
would be available if the range of values were restricted to the number
able to be expressed in 8-bit binary numbers.
1. Bit data
2. 8-bit and 16-bit signed and unsigned integers
3. 16-bit unsigned fractions
4. 16-bit addresses
Central Processor Unit (CPU)
Central Processor Unit (CPU)
Technical Data
Data Types
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