MC68HC711E9CFNE2 Freescale Semiconductor, MC68HC711E9CFNE2 Datasheet - Page 65

IC MCU 8BIT 512RAM 52-PLC

MC68HC711E9CFNE2

Manufacturer Part Number
MC68HC711E9CFNE2
Description
IC MCU 8BIT 512RAM 52-PLC
Manufacturer
Freescale Semiconductor
Series
HC11r
Datasheet

Specifications of MC68HC711E9CFNE2

Core Processor
HC11
Core Size
8-Bit
Speed
2MHz
Connectivity
SCI, SPI
Peripherals
POR, WDT
Number Of I /o
38
Program Memory Size
12KB (12K x 8)
Program Memory Type
OTP
Eeprom Size
512 x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
52-PLCC
Processor Series
HC711E
Core
HC11
Data Bus Width
8 bit
Data Ram Size
512 B
Interface Type
SCI, SPI
Maximum Clock Frequency
2 MHz
Number Of Programmable I/os
38
Number Of Timers
8
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
8 bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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4.1 Contents
M68HC11E Family — Rev. 3.2
MOTOROLA
Technical Data — M68HC11E Family
Section 4. Operating Modes and On-Chip Memory
4.2
4.3
4.3.1
4.3.2
4.3.3
4.3.4
4.4
4.4.1
4.4.2
4.4.3
4.4.3.1
4.4.3.2
4.4.3.3
4.5
4.5.1
4.5.2
4.5.3
4.6
4.6.1
4.6.1.1
4.6.1.2
4.6.1.3
4.6.1.4
4.6.1.5
4.6.1.6
4.6.2
Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66
Operating Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66
Memory Map. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69
EPROM/OTPROM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 92
EEPROM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 98
Operating Modes and On-Chip Memory
Single-Chip Mode. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66
Expanded Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .67
Test Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .67
Bootstrap Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68
RAM and Input/Output Mapping. . . . . . . . . . . . . . . . . . . . . . 80
Mode Selection. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82
System Initialization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 85
Programming an Individual EPROM Address . . . . . . . . . . . 93
Programming the EPROM with Downloaded Data. . . . . . . . 94
EPROM and EEPROM Programming Control Register . . . . 94
EEPROM and CONFIG Programming and Erasure. . . . . . . 98
EEPROM Security . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 104
System Configuration Register . . . . . . . . . . . . . . . . . . . . 86
RAM and I/O Mapping Register . . . . . . . . . . . . . . . . . . . .89
System Configuration Options Register . . . . . . . . . . . . . . 91
Block Protect Register . . . . . . . . . . . . . . . . . . . . . . . . . . . 99
EEPROM Bulk Erase . . . . . . . . . . . . . . . . . . . . . . . . . . . 103
EEPROM Row Erase . . . . . . . . . . . . . . . . . . . . . . . . . . . 103
EEPROM Byte Erase . . . . . . . . . . . . . . . . . . . . . . . . . . . 104
CONFIG Register Programming . . . . . . . . . . . . . . . . . .104
EPROM and EEPROM Programming
Control Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . 101
Technical Data
65

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