MC68HC711E9CFNE2 Freescale Semiconductor, MC68HC711E9CFNE2 Datasheet - Page 75

IC MCU 8BIT 512RAM 52-PLC

MC68HC711E9CFNE2

Manufacturer Part Number
MC68HC711E9CFNE2
Description
IC MCU 8BIT 512RAM 52-PLC
Manufacturer
Freescale Semiconductor
Series
HC11r
Datasheet

Specifications of MC68HC711E9CFNE2

Core Processor
HC11
Core Size
8-Bit
Speed
2MHz
Connectivity
SCI, SPI
Peripherals
POR, WDT
Number Of I /o
38
Program Memory Size
12KB (12K x 8)
Program Memory Type
OTP
Eeprom Size
512 x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
52-PLCC
Processor Series
HC711E
Core
HC11
Data Bus Width
8 bit
Data Ram Size
512 B
Interface Type
SCI, SPI
Maximum Clock Frequency
2 MHz
Number Of Programmable I/os
38
Number Of Timers
8
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
8 bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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M68HC11E Family — Rev. 3.2
MOTOROLA
$101A
$101B
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Addr.
Timer Input Capture 3 Register
Timer Output Compare 1
Timer Output Compare 1
Timer Output Compare 2
Timer Output Compare 2
Timer Output Compare 3
Timer Output Compare 3
Timer Output Compare 4
Timer Output Compare 4
Register High (TOC1H)
Register High (TOC2H)
Register High (TOC3H)
Register High (TOC4H)
Register Low (TOC1L)
Register Low (TOC2L)
Register Low (TOC3L)
Register Low (TOC4L)
Figure 4-7. Register and Control Bit Assignments (Sheet 4 of 8)
Register Name
See page 185.
See page 188.
See page 188.
See page 188.
See page 188.
See page 189.
See page 189.
See page 189.
See page 189.
Low (TIC3L)
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Read:
Read:
Read:
Read:
Read:
Read:
Read:
Read:
Read:
Write:
Write:
Write:
Write:
Write:
Write:
Write:
Write:
Write:
Operating Modes and On-Chip Memory
I = Indeterminate after reset
Bit 15
Bit 15
Bit 15
Bit 15
Bit 7
Bit 7
Bit 7
Bit 7
Bit 7
Bit 7
1
1
1
1
1
1
1
1
= Unimplemented
Bit 14
Bit 14
Bit 14
Bit 14
Bit 6
Bit 6
Bit 6
Bit 6
Bit 6
6
1
1
1
1
1
1
1
1
Bit 13
Bit 13
Bit 13
Bit 13
Bit 5
Bit 5
Bit 5
Bit 5
Bit 5
5
1
1
1
1
1
1
1
1
Indeterminate after reset
Bit 12
Bit 12
Bit 12
Bit 12
Bit 4
Bit 4
Bit 4
Bit 4
Bit 4
R
4
1
1
1
1
1
1
1
1
Operating Modes and On-Chip Memory
= Reserved
Bit 11
Bit 11
Bit 11
Bit 11
Bit 3
Bit 3
Bit 3
Bit 3
Bit 3
3
1
1
1
1
1
1
1
1
Bit 10
Bit 10
Bit 10
Bit 10
U = Unaffected
Bit 2
Bit 2
Bit 2
Bit 2
Bit 2
2
1
1
1
1
1
1
1
1
Bit 1
Bit 9
Bit 1
Bit 9
Bit 1
Bit 9
Bit 1
Bit 9
Bit 1
Technical Data
1
1
1
1
1
1
1
1
1
Memory Map
Bit 0
Bit 0
Bit 8
Bit 0
Bit 8
Bit 0
Bit 8
Bit 0
Bit 8
Bit 0
1
1
1
1
1
1
1
1
75

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